The explosive growth of deep learning applications has triggered a new era in computing hardware, targeting the efficient deployment of multiply-and-accumulate operations. In this realm, integrated photonics have come to the foreground as a promising energy efficient deep learning technology platform for enabling ultra-high compute rates. However, despite integrated photonic neural network layouts have already penetrated successfully the deep learning era, their compute rate and noise-related characteristics are still far beyond their promise for high-speed photonic engines. Herein, we demonstrate experimentally a noise-resilient deep learning coherent photonic neural network layout that operates at 10GMAC/sec/axon compute rates and follows a noise-resilient training model. The coherent photonic neural network has been fabricated as a silicon photonic chip and its MNIST classification performance was experimentally evaluated to support accuracy values of >99% and >98% at 5 and 10GMAC/sec/axon, respectively, offering 6× higher on-chip compute rates and >7% accuracy improvement over state-of-the-art coherent implementations.
We demonstrate a novel coherent Si-Pho neuron with 10Gbaud on-chip input-data vector generation capabilities. Its performance as a hidden layer within a neural network has been experimentally validated for the MNIST data-set, yielding 96.19% accuracy.
We experimentally demonstrate for the first time an all-optical fully-integrated InP CAM cell within a complete CAM Matchline architecture with RAM table Encoding and Decoding functionalities. Error-free operation has been evaluated at 5 Gb/s.
We demonstrate experimentally an integrated Si3N4 photonic 2x4 Row Decoder that utilizes a MRR-based wavelength filtering bank for successfully addressing one out of four RAM rows within an optical RAM bank architecture.
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