Abstract-Hardware technologies for trusted computing, or trusted execution environments (TEEs), have rapidly matured over the last decade. In fact, TEEs are at the brink of widespread commoditization with the recent introduction of Intel Software Guard Extensions (Intel SGX). Despite such rapid development of TEE, software technologies for TEE significantly lag behind their hardware counterpart, and currently only a select group of researchers have the privilege of accessing this technology. To address this problem, we develop an open source platform, called OpenSGX, that emulates Intel SGX hardware components at the instruction level and provides new system software components necessarily required for full TEE exploration. We expect that the OpenSGX framework can serve as an open platform for SGX research, with the following contributions. First, we develop a fully functional, instruction-compatible emulator of Intel SGX for enabling the exploration of software/hardware design space, and development of enclave programs. OpenSGX provides a platform for SGX development, meaning that it provides not just emulation but also operating system components, an enclave program loader/packager, an OpenSGX user library, debugging, and performance monitoring. Second, to show OpenSGX's use cases, we applied OpenSGX to protect sensitive information (e.g., directory) of Tor nodes and evaluated their potential performance impacts. Therefore, we believe OpenSGX has great potential for broader communities to spark new research on soon-to-becommodity Intel SGX.
This paper describes lhe architecture and implementation of a graphics coprocessor integrated with a MIPS-1 (R3000) compatible CPU core. The design of the graphics coprocessor has been oprimiscd for accelerating low level graphics operations typical in X Windows applications. I t has been implemented us coprocessor 2 using the coprocessor interface available on the CPU core. A set of specifically designed coprocessor 2 graphics instructions execute on the coprocessor and process pixel data fetched by dedicated DMA channels through a high bandwidth memory interface. The combination of the graphics coprocessor und high Oundwidlh memory interface result in a very high perfnrmcince.
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