Here, we experimentally and theoretically clarify III-V/Si crystal growth processes. Atomically-resolved microscopy shows that mono-domain 3D islands are observed at the early stages of AlSb, AlN and GaP epitaxy on Si, independently of misfit. It is also shown that complete III-V/Si wetting cannot be achieved in most III-V/Si systems. Surface/interface contributions to the free energy variations are found to be prominent over strain relief processes. We finally propose a general and unified description of III-V/Si growth processes, including the description of antiphase boundaries formation.

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This work shows that a large-scale textured GaP template monolithically integrated on Si can be developed by using surface energy engineering, for watersplitting applications. The stability of (114)A facets is first shown, based on scanning tunneling microscopy images, transmission electron microscopy, and atomic force microscopy. These observations are then discussed in terms of thermodynamics through density functional theory calculations. A stressfree nanopatterned surface is obtained by molecular beam epitaxy, composed of a regular array of GaP (114)A facets over a 2 in. vicinal Si substrate. The advantages of such textured (114)A GaP/Si template in terms of surface gain, band lineups, and ohmic contacts for water-splitting applications are finally discussed.photosemiconductor catalysts [4,5] is definitely the most promising tech nology for the near future with potentially plethora of hydrogen provided in a clean and sustainable manner. Many recent proposals deal with the use of the GaP semiconductor as a photoelectrode in PEC devices, [6] especially because its bandgap (2.26 eV) is larger than the 1.73 eV photo potential needed for water splitting. [7] Using this idea, demonstrations of GaP based PEC devices [8][9][10][11] and descriptions of the physics/chemistry of the standard GaP surface, [12] its interaction with water [13,14] and hydrogen generation [15] were reported. To enhance conversion efficiency of GaP based PEC devices, strategies like surface functionalization, [10] use of plasmon resonant nanostructures, [16] or integration of nanowires [17] were considered. Meanwhile, it was demonstrated recently that the texturation of surfaces at the electrode level greatly enhances the efficiency of BiVO 4 photoanodes in PEC devices. [18] Structuration of semiconductor surfaces can be per formed by lithography techniques, [19] chemical processes, [20,21] nanowires, or by a selforganization during the epitaxial process of the material itself. [22] This last approach is usually driven by crystal strainrelief processes; it simplifies the postgrowth device processing but does not offer large degrees of freedom,

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