For devices beyond the 14nm node, it is important to investigate performance boosters such as high mobility channels. Although pure Ge offers a higher hole mobility than Si, conventional problems like surface passivation and its integration with Si makes SiGe alloy with low Ge mole fraction a viable option. The significance of alloy scattering, however, has been widely debated [1-3], so the accurate modeling of alloy scattering in SiGe channel has become an important issue to predict the performance of future SiGebased FETs. Usually, the calculation of alloy scattering mobility assumes an alloy scattering center in a simple analytical form with some fitting parameters, which is a good practical approach but has a limited predictability. In this paper, an atomistic tight-binding simulation is used to study alloy scattering in SiGe-based FETs, and to compare with experimental data. We conclude (i) although it is essentially impossible to avoid alloy scattering in SiGe material, (ii) high-mobility is indeed achieved in SiGe channel by combining lattice-mismatch stresses from Si virtual substrate with stresses from Source/Drain(SD) stressor.
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