This paper investigates the fault-tolerance control of a multilevel cascaded NPC/H-bridge (CNHB) inverter. The fault-tolerance control method has been widely used for multilevel inverters, such as the neutral-point voltage-shifting control, which can operate for a certain period of time by compensating for the phase voltage of a faulty stack even if one stack is broken. Even though the three-phase equilibrium is maintained in the case of failure by using the conventional neutral-point voltage-shifting control, an imbalance in the output power occurs between each stack, which causes problems for maintenance and lifetime. Therefore, this paper proposes a fault-tolerance control that can maintain three-phase equilibrium in a case of stack failures and minimize power imbalances between the stacks. The problem of the conventional neutral-point voltage-shifting control is presented based on the output power. In addition, the power imbalance is improved by performing selective neutral-point voltage-shifting control according to the reference voltage range. To verify the principle and feasibility of the proposed neutral-point voltage-shifting control method, a simulation and an experiment are implemented with the CNHB inverter.

This paper studies the voltage fluctuation of dc-link generated in a 13-level cascaded neutral point clamped (NPC)/h-bridge (CNHB) with single-phase active front end (AFE) at the input side of each cell. The voltage fluctuation may deteriorate the power factor (PF) and current harmonics in the system. In this paper, new adaptive filters are proposed to overcome the problem. The center frequency of the proposed filters can be automatically varied, which allows to eliminate the specific harmonics in the dc-link well rather than the conventional one. Therefore, it can reduce the fluctuation of dc-link and maintain high PF and low current harmonic distortion without additional circuits externally or the current harmonics injection technique. As a result, capacitance for the dc-link can be optimally designed, and even cost and volume of the system can be reduced. This paper analyzes reasons of increasing voltage fluctuation theoretically and the conventional filter and proposed two types of adaptive filters are compared. In addition, the optimal design method of the dc-link capacitor necessarily used in NPC/h-bridge is presented. To verify the principle and feasibility of the proposed control method, a simulation and experiment are implemented with the CNHB system.

This paper propose Zero Dead-time PWM method in 3-Level NPC(Neutral Point Clamped) inverter. Each switch of conventional PWM method is performs to complementary switching and semiconductor switch devices have time difference between rising time and falling time. Therefore, dead-time is applied to rising edge of switching signal for prevent short circuit fault. But this dead-time cause distortion of output voltage and current due to signal difference between reference switching and real switching. These distortions are responsible for system instable and DC-Link voltage unbalance. Whereas proposed ZDPWM method does not shows output current distortion because dead time is not exist. The validity of proposed method is verified it through simulation.

This paper examines the characteristics of the zero voltage switching (ZVS) and zero voltage transition (ZVT) soft-switching applied in the 3-phase current fed dual active bridge (3P-CFDAB) converter, which combines the advantages of the dual active bridge (DAB) converter and current-fed full bridge (CFFB) converter. When an active clamp circuit is added to the CFFB converter, the circuit configuration of the DAB converter is shown in part of the entire circuit. This allows the use of pulse width modulation (PWM) techniques which combine the PWM techniques of both the DAB converter and CFFB converter. The proposed converter performs both duty and phase control at the same time in order to reduce the circulating current and ripple current of the output capacitor, which are the disadvantages of the CFFB converter and DAB converter. In addition, the ZVS and ZVT soft switching areas were analyzed by means of the phase current and leakage inductor current in each transformers. To verify the principle and feasibility of the proposed operation techniques, a simulation and experiment were implemented with the 3P-CFDAB.

This paper proposes a compensation method to improve the distorted space vectors when a 3-level Neutral Point Clamped (NPC) inverter has an unbalanced neutral point voltage. Since both the neutral point voltage of the DC link and the space vector of a 3-level NPC inverter are closely related depending on the output load connecting state, a distorted space vector can occur when the neutral point voltage of a 3-level NPC inverter is unbalanced. The proposed method can improve the distorted space vectors by adjusting the injection time of the small and medium vectors and by modulating the amplitude of the carrier waveforms. In this paper, the proposed method is verified by both simulation and experimental results based on a 3-level NPC inverter.

In a DC distribution system configured by AC/DC power conversion system (PCS), the voltage control performance of the AC/DC PCS determines the stability and reliability of the DC distribution grid. The DC voltage of grid is maintained by capacitor, thus transient voltage is an inevitable problem when a grid is connected with a high amount of load or renewable energy. Space vector pulse width modulation (SVPWM) is well known as a stable modulation method and is used in AC/DC PCS and many types of topologies, but a solution for the transient states issue of DC link has not clearly been studied. In this paper, a feedforward compensation method based on the mathematical model of SVPWM is proposed to solve the transient state problem in a DC distribution system. The proposed method is verified by simulation and experiment. AC/DC PCS with the proposed feedforward compensation method has more robust DC voltage control characteristics.

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.

-The performance of an isolated high voltage full bridge converter is improved using a voltage doubler. In a conventional high voltage full bridge converter, the diode of the transformer secondary voltage undergoes a voltage spike due to the leakage inductance of the transformer and the resonance occurring with the parasitic capacitance of the diode. In addition, in the phase shift control, conduction loss largely increases from the freewheeling mode because of the circulating current. The efficiency of the converter is thus reduced. However, in the proposed converter, the high voltage dual converter consists of a voltage doubler because the circulating current of the converter is reduced to increase efficiency. On the other hand, in the proposed converter, an input current is distributed when using parallel input / serial output and the output voltage can be doubled. However, the voltages in the 2 serial DC links might be unbalanced due to line impedance, passive and active components impedance, and sensor error. Considering these problems, DC injection is performed due to the complementary operations of half bridge inverters as well as the disadvantage of the unbalance in the DC link. Therefore, the serial output of the converter needs to control the balance of the algorithm. In this paper, the performance of the conventional converter is improved and a balance control algorithm is proposed for the proposed converter. Also, the system of the 1.5[kW] PCS is verified through an experiment examining the operation and stability.