The aim of this study was to propose an improved method for accurate dialysis dose evaluation and extrapolation by means of Kt/ V from online UV-absorbance measurements for real time and continuous treatment monitoring. The study included a total of 24 treatments from ten uremic patients, seven of whom were male and three females. All patients were on chronic thrice-weekly hemodialysis therapy. The study included both stable and unstable treatments. A known signal processing algorithm, Levenberg-Marquardt, and the newly developed SMART were utilized for the removal of disturbances not relevant for dialysis dose evaluation. Finally, the results were compared with the Kt/ V values based on the blood samples. The new data processing algorithm, SMART, removes disturbances, helps estimate the online Kt/ V with significant precision increase and without any time delay, and more effectively predicts the end Kt/ V for the treatment than the known algorithms.
The Negative Bias Temperature Instability (NBTI) phenomenon is agreed to be one of the main reliability concerns in nanoscale circuits. It increases the threshold voltage of pMOS transistors, thus, slows down signal propagation along logic paths between flip-flops. NBTI may cause intermittent faults and, ultimately, the circuit's permanent functional failures. In this paper, we propose an innovative NBTI mitigation approach by rejuvenating the nanoscale logic along NBTI-critical paths. The method is based on hierarchical identification of NBTI-critical paths and the generation of rejuvenation stimuli using an Evolutionary Algorithm. A new, fast, yet accurate model for computation of NBTI-induced delays at gate-level is developed. This model is based on intensive SPICE simulations of individual gates. The generated rejuvenation stimuli are used to drive those pMOS transistors to the recovery phase, which are the most critical for the NBTI-induced path delay. It is intended to apply the rejuvenation procedure to the circuit, as an execution overhead, periodically. Experimental results performed on a set of designs demonstrate reduction of NBTI-induced delays by up to two times with an execution overhead of 0.1% or less.The proposed approach is aimed at extending the reliable lifetime of nanoelectronics.
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