Multi-phase switching DC-DC converters offer many advantages in terms of high output power, low ripple, fast load transient response, high efficiency across a very wide range of load currents, and alleviated output filter requirements. However, the need for complex controllers that ensure accurate regulation and uniform current sharing between phases along with generation of multiple matched pulse-width modulated (PWM) signals complicate the design of multi-phase converters. Hysteretic control offers the simplest means to implement multi-phase converters and has been widely used in the prior art [1]. However, its nonlinear behavior leads to large output ripple, unpredictable loop dynamics, and wide variation in switching frequency (F SW ), which are undesirable in many noise-sensitive applications. Furthermore, they require current sensors to implement active current sharing, and generation of multiple synchronized PWM signals requires power hungry circuits [1]. A voltage-mode controller using a type-III compensator is well-suited for low-noise applications but it requires multiple synchronized and matched ramp generators that also incur large area and power penalty. A digital PWM generator can provide accurately matched multi-phase PWM signals thereby enabling passive current sharing, but digitally controlled buck converters exhibit large ripple due to their limit cycle behavior, have poor transient response, and consume significant quiescent current [2][3]. All these issues become even more challenging to address in high-F SW converters because of more stringent loop-delay requirements.In this paper, we present a 30-to-70MHz 4-phase buck converter using a time-based type-III compensator. By generating multiple inherently matched PWM signals, the architecture maximizes efficiency, eliminates the need for active current sharing, and achieves excellent regulation accuracy and fast load transient response across a wide range of output voltages. The buck converter occupies 0.32mm 2 die area resulting in a power density of 2.5W/mm 2 . Figure 12.2.1 shows a block diagram of the 4-phase buck converter. It consists of a type-III time-based compensator, multi-phase generator (MPG), cycle-slip detector (CSD), phase controller (PC), PWM generator (PG) and a driver stage.A transconductor, G MI , implemented using a simple differential pair converts error voltage (V E = V REF -βV OUT ) into differential current and feeds it to currentcontrolled ring oscillators (CCO R and CCO F ), which act as phase integrators and implement integral control. Current-controlled delay lines (CCDL R and CCDL F ) driven by a transconductor, G MPD , shift the phase of CCO R and CCO F outputs and implement proportional/derivative control. Hence the phase difference between CCDL R and CCDL F outputs, Φ R and Φ F , represents compensator output such that Φ R -Φ F is proportional to the duty cycle needed to regulate the output voltage at the desired value [4]. MPG implemented using a circular shift register operates on Φ R (Φ F ) and generates 90°ph...