The principal causes of the poor picture quality on active matrix organic light-emitting diode (AMOLED) displays, operating under extremely low brightness and gray-scale conditions, were analyzed and verified by measuring and modelling of the electrical simulations. Through the analysis, it was found that the deteriorated picture quality was induced by a delayed saturation voltage, which means the electric potential difference between the initial voltage applied to the anode of the OLED (V init ) and the OLED saturated voltage (V sat ) for emission. This is because the deviations of pico-ampere-level currents and delayed OLED charging prior to light emission increased the saturation voltage when there were low driving currents. Thus, we optimized the voltage by increasing V init from −4.5 to −2.7 V, effectively eliminating image deterioration by reducing the OLED charging delay. Thus, the proposed approach opens up advancements of obtaining superior picture quality with ultra-low luminance, even in the dark illuminance environments. We discuss how OLED picture quality may be enhanced under low brightness, including the driving methods, design considerations, and processes involved.
Organic light-emitting diode (OLED) display panel using the charge-pump (CP) pixel addressing scheme was fabricated, and the results show that it is applicable for information display. A CP-OLED panel with 64 × 64 pixels consisting of thinfilm capacitors and amorphous silicon Schottky diodes was fabricated using conventional thin-film processes. The pixel drive circuit passes electrical current into the OLED cell during most of the frame period as in the thin-film transistor (TFT)-based active-matrix (AM) OLED displays. In this study, the panel was operated at a voltage level of below 4 V, and this operation voltage can be reduced by eliminating the overlap capacitance between the column bus line and the common electrode.
An organic light-emitting diode (OLED) display panel using a charge-pump (CP) pixel addressing scheme was implemented and shown to be effective for information display applications. The panel luminance was 681 cd/m 2 when driven by control signals with an amplitude of 8 V and a common-cathode voltage of 6 V. It was found that the parasitic overlap capacitance between a common electrode and a column bus plays a crucial role in the operation of the CP-OLED display panel. The losses of panel luminance and contrast ratio due to the capacitance could be minimized by optimizing the pixel layout design and fabrication processes.
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