Traps in InAlN/GaN and AlGaN/GaN high electron mobility transistors (HEMTs) are identified and compared using constant drain-current deep level transient spectroscopy (CID-DLTS). For both structures with different barrier materials, the same drain-access electron trap at EC−0.57 eV dominates the drain-controlled CID-DLTS trap spectrum. This suggests that the physical source of this trap, previously associated with drain-lag, is not present in the barrier but instead is likely to reside in the GaN-buffer. Gate-controlled CID-DLS measurements, which are preferentially sensitive to the barrier under the gate, reveal different trap spectra for the two HEMTs, showing that choice of barrier materials can influence under-gate trap signatures.

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The effects of power and time conditions of in situ N 2 plasma treatment, prior to silicon nitride (SiN) passivation, were investigated on an AlGaN/GaN high-electron mobility transistor (HEMT). These studies reveal that N 2 plasma power is a critical parameter to control the SiN/AlGaN interface quality, which directly affects the 2-D electron gas density. Significant enhancement in the HEMT characteristics was observed by using a low power N 2 plasma pretreatment. In contrast, a marked gradual reduction in the maximum drain-source current density (Ins mux) an d maximum transconductance (g m max)» as well as in fy and / max , was observed as the N 2 plasma power increases (up to 40% decrease for 210 W). Different mechanisms were proposed to be dominant as a function of the discharge power range. A good correlation was observed between the device electrical characteristics and the surface assessment by atomic force microscopy and Kelvin force microscopy techniques.

Trapping effects were evaluated by means of pulsed measurements under different quiescent biases for GaN/AlGaN/GaN and GaN/InAlN/GaN. It was found that devices with an AlGaN barrier underwent an increase in the on-resistance, and a drain current and transconductance reduction without measurable threshold voltage change, suggesting the location of the traps in the gate-drain access region. In contrast, devices with an InAIN barrier showed a transconductance and a decrease in drain associated with a significant positive shift of threshold voltage, indicating that the traps were likely located under the gate region; as well as an onresistance degradation probably associated with the presence of surface traps in the gate-drain access region. Furthermore, measurements of drain current transients at different ambient temperatures revealed that the activation energy of electron traps was 0.43 eV and 0.38 eV for AlGaN and InAIN barrier devices, respectively. Experimental and simulation results demonstrated the influence of device geometry on the observed trapping effects, since devices with larger gate lengths and gate-to-drain distance values exhibited less noticeable charge trapping effects.

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