An ion-implanted planar gate power MESFET for low voltage digital wireless communication system including DCS1800 (digital cellular system at 1800 MHz) and CDMA (code division multiple access) handset applications has been developed. The process for the device developed contains double Be implantation to reduce the surface and substrate defect trapping effects. The MESFET process developed has very little gate recess (less than 200 Angstrom), which greatly improves the uniformity and the yield of the wafer, The 1 mu m x 20 mm MESFET manufactured using this planar gate technology exhibits an output power of 32.98 dBm and power added efficiency over 53% with gain of 11.2 dB when tested at 1.9 GHz under 3.6 V drain bias voltage and 80 mA quiescent drain current. The pinch off voltage of the 20 mm devices within a wafer is -2.81 V with a standard deviation of 120 mV, The device was also tested at 3.6 V and 1.9 GHz for CDMA application. Under the IS-95 CDMA modulation at 28 dBm output power, the device gain is 10.7 dB and the device has an adjacent channel power rejection (ACPR) of -29.5 dBc at 1.25 MHZ offset frequency and -44.9 dBc at 2.25 MHz offset. The test data shows that the double Be implanted devices developed using the planar gate technology have very good linearity and efficiency and can be used for the low voltage DCS1800 and CDMA handset applications
A high efficiency and high linearity 1.2 V-operational AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) for digital wireless personal handy phone (PHS) handset application has been developed. The device exhibits maximum power added efficiency (PAE) of 43.62 % at 1.2 V drain bias. Under 1.9 GHz • /4-shifted QPSK modulated PHS signal, the device shows an output power of 22.02 dBm with linear efficiency of 37% and adjacent channel leakage power (ACP) of -56.86 dBc at 600 kHz apart from the center frequency. The device developed shows excellent performance at 1.2 V operation and can be used for low voltage PHS handset application.
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