In this paper we investigate the drain stress behavior and charge trapping phenomena of GaN-based high electron mobility transistors (HEMTs). We fabricated GaN-on-Si MIS-HEMTs with different dielectric stacks in the gate and gate drain access region and performed interface characterization and stress measurements for slow traps analysis. Our results show a high dependency of the on-resistance increase on interfaces in the gate-drain access region. The dielectric interfaces near the channel play a significant role for long term high voltage stress and regeneration of the device
In this paper we present a new poly-silicon gate process for AlGaN/GaN MIS-HEMT power transistors. Using a complete metal-free front-end processing of the gate module the process is fully CMOS compatible. Additionally, the gate reliability can be significantly increased. We used a three-step LPCVD SiN passivation fully enclosing the gate electrode made of polycrystalline silicon. As gate dielectrics LPCVD deposited SiN are used with a thickness of 20nm and 120nm. We compared these devices with MIS-HEMTs using Al as gate electrode. Constant current measurements have been performed that show with Q(BD,poly,20) nm=714 C/cm2 and a MTTF(0.5A/cm2) =1293s significant higher charge pumping capability through the gate for the poly-Si gated devices compared to conventional metal gates
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