This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Two modulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 SMs per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experiments on a low power phase-leg MMC laboratory prototype.

The large number of voltage levels in a modular multilevel converter (MMC) make staircase modulation a feasible alternative, particularly in high-power applications. However, staircase waveforms do not necessarily mean operation of the MMC submodules (SMs) at fundamental frequency. This paper presents an analysis of SM switching frequencies in staircase modulated MMCs and their correlation to the modulation index and load phase angle. A carrier based pulse-width modulation (CB-PWM) equivalent technique is also developed. The presented analysis demonstrates that CB-PWM techniques provide similar switching frequency with superior harmonic performance and improved voltage balancing characteristics at all modulation indices compared to staircase modulation. The theoretical analysis is verified with extensive simulation results for MMCs with different number of SMs and experimental results from a laboratory prototype.

This paper reports a comparison study of different carrier-based PWM techniques applied to the modular multilevel converter. Phase-disposition PWM (PD-PWM) and phase-shifted pulse-width modulation (PS-PWM) with non-interleaving and interleaving are considered in this study. In PS-PWM, two cases are evaluated. In the first case, the particular SMs that have to be activated/deactivated are defined by a voltage balancing algorithm, which is the same one implemented in PD-PWM. In addition, an algorithm to restrict the number of switching SMs is also implemented to reduce the switching frequency of the power devices. In the other case of PS-PWM, each sub-module (SM) has a carrier signal associated to it and capacitor voltage balance is achieved by individual control of its capacitor voltage. The circulating current is controlled to be a dc component in all the cases. Simulation and experimental results are presented to evaluate the quality of the line-to-line output voltages and SM capacitor voltage ripples for the different cases under study. © 2014 IEEE.Peer ReviewedPostprint (published version

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