This paper presents a ±2A fully-integrated current sensor with a 20 mΩ on-chip shunt (resistor). It employs an energyefficient hybrid sigma-delta ADC with an FIR-DAC and consumes only 1.4 μA, a 3× improvement on the state-of-theart. A tunable analog non-linear temperature-compensation scheme (TCS) allows ±2A currents to be digitized with 0.35% gain error from −40 to 85 °C. With a 3 mΩ PCB shunt, ±15A currents can be digitized with slightly more (0.6%) gain error. In a 0.18 μm CMOS process, the sensor occupies 1.6 mm 2 .
This paper presents a nano-power high-side shunt-based current sensor (CS) that digitizes the voltage drop across an onchip (±1A) or a lead-frame (±30A) shunt. A TC-tunable ADC reference compensates for the shunts' large temperature coefficient (TC), resulting in ±0.5% gain error from -40 to 85°C. The CS employs a capacitively coupled gm-boosted front-end followed by a CCO-based ∆Σ ADC. Together with a floating input chopper, this results in an input common-mode range (ICMR) of 0-to-15V, the largest reported for a CS implemented in a standard CMOS process. It achieves high energy efficiency (164dB FoM) while consuming only 720nW, representing a 4× improvement on the state-of-the-art and making this the first ever reported sub-µW smart current sensor.
This letter presents a low-power, fully integrated current sensor for Coulomb-counting. It employs a hybrid delta-sigma modulator ( M) with an FIR-DAC to digitize the voltage drop across a shunt. The modulator's first stage consists of a capacitively coupled chopper amplifier, which enables a beyond-the-rails (−0.3 to 5 V) input commonmode voltage range from a 1.8-V supply. A tunable voltage reference is used to accurately compensate for the large temperature coefficient (∼3500 ppm/ • C) of low-cost metal shunts. With a 20-m on-chip shunt, ±2 A currents can be digitized with 0.35% gain error from −40 • C to 85 • C, after a 1-point trim. With a 3-m PCB trace, currents up to ±15 A can be digitized with 0.6% gain error over the same temperature range. Fabricated in a standard 0.18-μm CMOS process, the sensor occupies 1.6 mm 2 and consumes 2.5 μW, which is 3× less than the state of the art. It also achieves competitive energy efficiency, with a figure of merit (FoM) of 149 dB.
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