A new family of GTO (gate-turn-off) thyristors suitable for use in medium-frequency resonant converters is presented. The devices were designed so as to minimize the energy losses in the GATT (gate assisted) mode of operation. To this end, some modification to the fabrication process that improve the GTO characteristics in this particular application area were introduced. The devices were evaluated in a flexible test circuit especially developed to emulate the operating conditions seen in a parallel-load resonant inverter. This allowed an experimental investigation of their behavior in the various phases of operation (turn-on, conduction, turn-off, direct voltage reapplication, and tail). Testing demonstrated their ability to operate at frequencies up to 50 kHz and at powers up to hundreds of kilowatts. The main electrical characteristics of the devices, as derived from test measurements, are illustrated. Indications for an optimal utilization in resonant inverters are given, and other possible applications, notably in soft switching converters, are discussed
New generations of CMOS field effect transistors (FET) impose stringent controls of device geometries and material properties. Moving towards more aggressively scaled dimensions increases the level of the different specifications to mitigate the contributions from parasitics and improve the performance. Device simulations for instance often emphasize performance degradations due to increasing contact resistances [1] and define contact resistivity targets for the upcoming technology nodes [2]. A significant step towards decreasing the metal-to-semiconductor contact resistivity and thereby alleviating these limitations can be achieved through high active doping concentrations within the p-type source / drain (S/D) layers e.g. in the case of pMOSFETs. This paper therefore focuses on strain-related effects influencing the incorporation of B dopants in SiGe S/D and on the consequences on the specific resistivity of Ti / SiGe:B contacts. We have shown in a previous contribution that strain relaxation leads to a decrease in B incorporation efficiency during the chemical vapor deposition of in-situ doped SiGe:B epilayers on Si(001) [3]. This negatively impacts the Ti / Si1-xGex:B contact resistivity. Similar behaviors were observed for three series of samples with compositions ranging from 25 to 65% Ge. The layers presented covered only a limited range of degrees of strain relaxation (DSR), e.g. up to ~ 30% in the case of Si0.5Ge0.5:B. In this paper, we extend these learnings by growing the different epitaxial materials on commercially available 300 mm strain-relaxed buffers (SRB). Three SRB compositions are used, with Ge contents of 25, 50 and 70%. They all present relatively low and well controlled threading dislocation densities (TDD) [4]. Table 1 summarizes results obtained from Si0.5Ge0.5:B epilayers with nominal thicknesses of 20 and 50 nm. The resistivity of the layer grown on Si increases by ~ 10% when the DSR reaches 28% (partially relaxed material). This is due to a dynamic decay in B doping efficiency as the material relaxes, resulting in a reduced B surface chemical concentration ([B]chem,surf). The situation is however different when growing the S/D material on Si1-xGex SRB. This approach allows us to explore the impact of the substrate lattice parameter, thereby inducing a modification of the strain state at the growth start. As expected, reducing the compressive strain leads to lower B concentrations and increased resistivities. The new results therefore confirm the trends previously extracted in [3], where an increase in material resistivity was reported for layers with different Ge contents due to an increasing DSR. The extraction of similar [B]chem from Si0.5Ge0.5:B grown on Si and on Si0.75Ge0.25 SRB also indicates that misfit dislocations introduced by the SiGe / Si relaxation process do not play a significant role in the B incorporation efficiency. We infer that this assessment is important to understand in situ doping phenomena and address new device challenges. Acknowledgments: Gianluca Rengo received a PhD grant from the Flemish Research Foundation (FWO). All epitaxial depositions presented in this work were done in ASM Intrepid® reactors. The SiGe SRB wafers were provided by Siltronic. Clement Porret and Gianluca Rengo contributed equally to this work. References: [1] A. V. Thean et al., 2015 Symposium on VLSI Technology, pp. T26-T27 (2015); [2] P. Raghavan et al., IEEE Custom Int. Circuit Conf., 1 (2015); [3] G. Rengo et al., ECS Trans., 98 (5), 27 (2020); [4] G. Kozlowski et al., ECS Trans., 50 (9), 613-621 (2012). Figure 1
The impact of strain on the growth of in situ boron doped Si 0.5 Ge 0.5 epitaxial layers is discussed. The lattice strain has been varied by changing the Si 0.5 Ge 0.5 thickness and by growing the epitaxial layer on strain relaxed substrates with different Ge concentrations. With decreasing compressive strain, the B incorporation reduces, and the Ge concentration increases. Through density functional theory calculations, the dependence on the applied strain of the energetic cost for boron incorporation into the Si 0.5 Ge 0.5 surface was investigated.
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