In this paper, an analytical model of trapping in high-k dielectrics is proposed. It starts from the general rate equation and relies on the hypothesis that the density of states involved in the capture mechanism follows a Fermi-like distribution. Thus, the energy depth of the trap level respect to the Fermi level is explicited in the model. The model is validated comparing predictions of flat band shift (calculated integrating the density of involved states) with experimental curves measured on GdSiO metal-oxide-semiconductor capacitors in many different conditions. The energy level of the trap is extracted. (C) 2010 American Institute of Physics. [doi:10.1063/1.3503583
In this article, the authors systematically characterized TiN/GdSiO/ SiO 2 /Si metal oxide semiconductor capacitors from the point of view of charge trapping. Charge trapping was investigated measuring the flatband voltage with the pulsed capacitance-voltage (C-V) technique, in condition of injection from gate and substrate. As a result, a bell shaped curve of the flatband shift versus trapping time was found, with a turn-around at 100-200 μs. This was explained as the concomitant of transient phenomena due to a charge of opposite polarity starting from the two different interfaces of the high- k film. This study was possible only because of the pulsed C-V technique. At long times, trapping has always shown a logarithmic trend and the kinetics of trapping is linearly dependent on the applied voltage. Finally, dc and pulsed stress were performed at voltages of interest for logic applications. © 2011 American Vacuum Society
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