In this brief, designs of two millimeter wave (mmWave) reconfigurable multi band low noise amplifiers (LNA) are presented targeted for fifth generation (5G) communications. A reconfigurable tunable load based on electrical and magnetic tuning is proposed to cover three mmWave frequency bands for 5G, i.e. 24 GHz, 28 GHz and 39 GHz. Two LNA structures are designed and fabricated using 45nm CMOS SOI technology. The first toplogy (LNA1) is composed of a single input wideband matching circuit to cover frequency operations from 24 GHz to 40 GHz. On the other hand, second topology (LNA2) uses three separate narrowband match inputs, one for each frequency band, with combined output. Design methodology of passive and active devices is presented towards compact integration of LNAs for systems such as, phased arrays. Ground plane and its impact on the performance parameters is also discussed in this work. Measurement results show a wideband noise figure (NF) ranging from 3.8 dB to 4.9 dB and gain of 8.5 dB to 12.5 dB for LNA1 at different bands. Similarly, LNA2 exhibits NF of 4.5 dB to 5.5 dB and gain of 9.5 dB to 15.5 dB across all bands. Total area (including pads) of LNA1 and LNA2 are 0.316 mm 2 and 0.695 mm 2 , respectively.
Abstract-This paper presents an active RF phase shifter with 10 bit control word targeted toward the upcoming 5G wireless systems. The circuit is designed and fabricated using 45 nm CMOS SOI technology. An IQ vector modulator (IQVM) topology is used which provides both amplitude and phase control. The design is programmable with exhaustive digital controls available for parameters like bias voltage, resonance frequency, and gain. The frequency of operation is tunable from 12.5 GHz to 15.7 GHz. The mean angular separation between phase points is 1.5 degree at optimum amplitude levels. The rms phase error over the operating band is as low as 0.8 degree. Active area occupied is 0.18 square millimeter. The total DC power consumed from 1 V supply is 75 mW.
This paper presents a fully integrated phased array receiver containing two four element Radio Frequency (RF) Beamforming (BF) receivers supporting two Multiple-Input Multiple-Output (MIMO) channels. The receivers are designed and fabricated using 45nm CMOS SOI technology. A 10 bit IQ vector modulator phase shifter (IQVM) is implemented in RF signal paths to control the phase and amplitude of the received signal before combining. Each IQVM provides 360 degree phase shift control and 17 dB gain variation. An off-chip, simultaneous high-Q impedance matching and bandpass filtering technique for each low-noise amplifiers (LNA) is presented using non-uniform transmission line (NUTL) segments. Measured downconversion gain at 100 MHz Intermediate Frequency (IF) and noise figure (NF) of a single path are 23 dB and 5.4dB, respectively, giving estimated 3.4 dB NF for a single element when simulated PCB and matching losses are taken into account. 1 dB compression and Input third-order intercept point (IIP3) are-37 dBm and-28 dBm, respectively. Each four-element receiver consumes 486 mW DC power from 1.2V power supply. Total area of two receivers is 5.69 mm2.
Abstract-This paper presents a fully integrated, four stack power amplifier for 5G wireless systems. The frequency of operation is tunable from 12 GHz to 14 GHz, with a maximum 3 dB bandwidth of 1 GHz and a maximum possible gain of 35 dB. The circuit is designed and fabricated using 45 nm CMOS SOI technology. Maximum RF output power, power-added efficiency (PAE) and output 1 dB compression point under maximum bandwidth configuration are 17.7 dBm, 23.2 % and 12.3 dBm, respectively, achieved at 13.7 GHz.
Current millimetre-wave (mmW) 5G NR standard supports multiple bands at 24.5/28/37/39/43/47GHz for communications. To cover several bands of the 5G NR and reaching lower end of unlicensed 60GHz band for 802.11ad, this work presents a wideband phased array front-end with LNA and two VGAs for scalar-only weighting function, and a wideband combining network of each signal weight in mmW domain for beamforming. In this work, two array elements are combined in two cascaded stages for extremely wideband operation. Combined load resonances are distributed and adjusted appropriately in each of the combining stages to achieve a flat response over the band of 38.5-60.5GHz. A single array path achieves rms gain of 8.5-12.5dB, noise figure of 6.2-8.1dB, and IP1dB of -33 to -26dBm. The measurements show ≈ 6dB of array gain when the two phased array elements are combined in phase with +0.6dB to -0.4dB maximum gain error in the mmW VGAs. The prototype is implemented using 28nm CMOS.
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