The reliability analysis and lifetime prediction for SiC-based power modules is crucial in order to fulfill the design specifications for nextgeneration power converters. This paper presents a fast mission-profile-based simulation strategy for a commercial 1.2 kV all-SiC power module used in a photovoltaic (PV) inverter topology. The approach relies on a fast condition-mapping simulation structure and the detailed electro-thermal modeling of the module topology and devices. Both parasitic electrical elements and thermal impedance network are extracted from the finite-element analysis of the module geometry. The use of operating conditions mapping and look-up tables enables the simulation of very long timescales in only a few minutes, preserving at the same time the accuracy of circuit-based simulations. The accumulated damage related to thermo-mechanical stress on the module is determined analytically and a simple consumed lifetime calculation is performed for two different mission profiles and compared in different operating conditions.
Gallium oxide (Ga2O3) based semiconductor devices are expected to disrupt power electronic applications in the near future. Due to the wide bandgap of Ga2O3, it should be possible to fabricate power devices with higher breakdown voltages and lower on-state resistances compared to incumbent Silicon (Si) and Silicon Carbide (SiC) technologies. In particular, vertical metal-oxide field effect transistor (MOSFETs) and vertical Fin Field Effect Transistor (FinFETs) devices based on Ga2O3 have been recently reported. Here, we present a comparative modelling study of such vertical Ga2O3 power transistors using use Technology Computer Aided Design (TCAD) and analyze their electro-thermal performance under static and dynamic operating conditions. We find that the MOSFETs show a trade-off between the current gains and threshold voltages, as a function of device geometry and acceptor concentrations in the body region. In contrast, in the FinFETs structures it is possible to achieve normally-off operation by proper design of the fin width and its donor concentration, without p-type doping. Overall, the modeling and analysis results presented here can be used as a guide for experimental improvement of the vertical Ga2O3 device performance for future power electronic applications.
1 1 Abstract-This paper describes a high temperature voltage comparator and an operational amplifier in a 1.2 µm silicon carbide CMOS process. These circuits are used as building blocks for designing a high temperature SiC low-side over current protection circuit. The over current protection circuit is used in the protection circuitry of a SiC FET gate driver in power converter applications. The op amp and the comparator have been tested at 400 °C and 550 °C temperature respectively. The op amp has an input common-mode range of 0-11.2 V, DC gain of 60 dB, unity gain bandwidth of 2.3 MHz and a phase margin of 48° at 400 °C. The comparator has a rise time and a fall time of 38 ns and 24 ns, respectively, at 550 °C. The over current protection circuit, implemented with these analog building blocks, is designed to sense a voltage across a sense resistor up to 0.5 V.
Keywords-comparator, op amp, current sensor, silicon carbide, high temperature electronics, wide bandgap ICs.
I.K. Addington is with the
A fast electro-thermal simulation strategy for SiC power MOSFETs is presented in this paper. This approach features the detailed mapping of the device power losses under a wide range of operating conditions by using a compact electrical model and its experimental validation for a 1.2 kV/ 36 A commercial device. The losses condition map is used in the simplified model of a half-bridge inverter topology. The average device losses per switching period are injected into a multi-layer thermal impedance network obtained via finite-element method (FEM) simulation. The strategy allows the electro-thermal simulation of a simple switching pattern in a very short time (seconds), compared to an equivalent physically-based circuit simulation, without significant accuracy loss, enabling long-timescale simulation and reliable, mission-profile oriented design of power electronic converters.
a b s t r a c t Switched power electronic converters involve different control actions for different system events. A local control strategy may be developed which reacts only to some local information available to each component without any communication between the different system components located far away in real time. The purpose of this paper is to present a low cost memory based control strategy in a dc-dc boost converter. The control employed in this work is based on a sliding-mode hysteretic control strategy where the sliding manifold is derived a priori and stored as a look-up table in digital memory hardware. The proposed control implementation strategy is low cost and offers a robust dynamic response that is used to mitigate many disturbances in the system.
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