Improved and small flat group delay low pass filters are presented. The design of these filters is based on two CPW stub topologies. The improvement of the flatness group delay is achieved by loading the stub at the appropriate positions. The straight stub filter is realised and measured, and a good agreement is observed. The second topology is based on a reshaped open circuit stub. The optimized structures are well matched beyond the cutoff frequency with a flat group delay.
This paper describes a method for obtaining the microstrip circuit source and load impedances which permit a certain transistor gain/power load performance to be realised. A conventional power test bench, a small signal network analyser and a simple computer program are used, and the method may be extended to give complete large-signal S-parameter characterisation of the transistor for any desired power output, by a series of 4 small-signal S-parameter measurements and one large-signal measurement. The validity of the measurements made is proven by using them to design a 5.9-6.4 GHz balanced amplifier giving IW of output power with 20 dB gain at I dB gain compression point.
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