THIS PAPER describes an IC design that includes on one chip, the RF amplifier, mixer, IF amplifier, VCO, frequency divider. phase/frequency detector, x2 frequency multiplier, and power regulation functions for a global positioning system (GSP) receiver ( Figure 1). The GPS L-band frequency is amplified and then down converted to an IF near 60MHz. A commonemitter amplifier is designed for low noise, stable gain, and a 50 ohm input match. A four-quadrant mixer is used for the down conversion, and the IF amplifier drives a 50 ohm output.The VCO and prescaler operate at half the LO frequency. The negative impedance VCO uses an external microstrip resonator loaded with an external varactor diode.The prescaler uses ECL masterlslave flip-flops to divide the VCO frequency by 160 to drive the phase detector and output buffers which supply frequencies at one fourth and one-eightieth of the LO frequency. These are used elsewhere in the receiver system. The ECL phase detector generates an error voltage proportional to either the frequency, or phase difference between the reference and prescaled VCO signals, which is then applied to the external varactor. The loop bandwidth is determined by the integrator time constant set with external R-C elements. A switchable divide-by-four at the input allows use of an external reference frequency near either 5MHz or 20MHz.The receiver chip downconverts the low-level GPS signals with conversion gain of about 50dB while processing high-level digital signals. Isolation of signals between the different functions on the chip made it necessary to identify and control the crosstalk associated with common power supply and ground impedances, mutual lead capacitances (both on-chip and offchip), substrate isolation, and internal circuit isolation.in a silicon bipolar process that offers NPN transistors with typical fT of 6.5GHz.
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