Structural reliability of electronic packages has become an increasing concern for a variety of reasons including the advent of higher integrated circuit densities, power density levels, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors. In this paper, the theory of conduction in piezoresistive materials is reviewed and the basic equations applicable to the design of stress sensors on test chips are presented. General expressions are obtained for the stress-induced resistance changes which occur in arbitrarily oriented one-dimensional filamentary conductors fabricated out of crystals with cubic symmetry and diamond lattice structure. These relations are then applied to obtain basic results for stressed in-plane resistors fabricated into the surface of (100) and (111) oriented silicon wafers. Sensor rosettes developed by previous researchers for each of these wafer orientations are reviewed and more powerful rosettes are presented along with the equations needed for their successful application. In particular, a new sensor rosette fabricated on (111) silicon is presented which can measure the complete three-dimensional stress state at points on the surface of a die

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This paper presents a study of the variation of the piezoresistive coefficients over several devices on the same die, the same wafer, and finally at different doping levels. The sensor test vehicles are fully documented, and a thorough error analysis on the method of applying a known uniaxial state of stress is presented. The results show that individual stress sensor calibration is required if the uncertainty in the absolute values of the measured stresses need to be less than 15%. If the uncertainty only needs to be less than 50% then one device per wafer can be calibrated, or an equation relating the unstressed resistance values to the piezoresistive coefficients can be used. Piezoresistive Coefficient Variation StudvAlthough the study of the piezoresistive effect in silicon has been investigated for some time now, the variation of the piezoresistive coefficients associated with piezoresistive-based integrated circuit stress sensors has not yet been addressed with any great certainty in the literature. The motivation for a thorough understanding of these coefficients and their variation with doping density, dopant type, temperature, and other physical parameters, is driven by the present need to individually calibrate the sensors to obtain accurate stress measurements [51[61[71[81[91. Present stress sensing chips designed to measure the distribution of a single stress component over a die can contain over twenty resistors [lo], each of which needs calibration to assure accuracy of subsequent stress measurements. This number of resistors can further increase if it is desired to measure biaxial or triaxial stress states at each point of interest. This places an excessive burden on the calibration process if enough stress sensing chips are to be obtained to be able to qualify a process sequence or packaging technology.In order to determine the number of calibrations required for a specific error tolerance, an analysis of the piezoresistive coefficient variation over many devices is required. If it is found that the coefficients vary only a small percentage over an entire wafer, then one calibration step could suffice for that entire wafer. If the coefficients vary only slightly from wafer to wafer then possibly one device per lot could suffice for the calibration needs. Understanding these variations of the coefficients is essential to determining the calibration requirements of a specific application.The following sections of this paper address the observed variations of the calibrated piezoresistive coefficients versus doping density as well as quantifying the experimental error associated with the four-point bend (4PB) stress fixture used in the calibration experiments.

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