The camera digital signal processing (DSP) core is a key component for a video catching system. In this study, first high-performance and low-complexity algorithms are developed for the camera DSP system. The main functions involve the color interpolation, white balance, color space transformation, auto gain control, edge enhancement and color enhancement. Simulations demonstrate that the proposed method can achieve good quality as for a color-filter-array format camera. Based on the algorithms, the DSP processor is developed with pipelined structure. The prototyping chip is verified with one FPGA device, and then its ASIC is also realized with 0.35um CMOS process. A real-time camera system with 1270x792 resolutions is successfully demonstrated by the combination with the extra components within one PCB broad.
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