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Intra-body communication (IBC) is a novel key research area that will foster personalized medicine by allowing in situ and real time monitoring in daily life. In this work, the energy efficient galvanic coupling (GC) technology is used to send data through intra-body links. A novel sound card-based GC testbed is designed and implemented, whose main features are: (i) low equipment requirements since it only employs two ordinary PCs with sound card support and Matlab software, (ii) high flexibility since all the parameters setting may be easily modified through the PC control panel and Matlab programs, (iii) real time physiological data transmissions, and (iv) almost error free communication by developing specific physical (PHY) layer techniques, which are implemented and tested with a real chicken tissue in the experimental evaluation. A signal to noise ratio (SNR) calculation is also proposed with the twofold purpose to be used for frequency offset compensation and as metric to evaluate the proposed architecture. The developed GC testbed may be easily replicated by the interested research community to carry out simulation-based experiments, thus fostering new research in this field. Moreover, the Matlab source code of the proposed GC transceiver is freely available online on Code Ocean.

Positioning capability represents one of the basic features of modern Internet of Things (IoT) applications. Although this objective may be pursued by using Global Navigation Satellite Systems, cheaper and simpler techniques are more suitable for low‐power networks. In this letter, we present a complete experimental data set of received signal strength indicator (RSSI) measurements collected in different indoor and outdoor environments using LoRa radios. Moreover, we apply simple and power efficient localization algorithms on the obtained data set. The main goal of this work is to share both the experimental data set and the preliminary results on localization among the community.

38The availability of multi-standard terminals will be key to provide location independent connections able to take advantage of any possible infrastructure. This paper addresses both the architecture and the circuits for the RF front-end of a terminal with cellular (GSM, EDGE and UMTS), LAN (IEEE802.11a/b/g) and Bluetooth radio interfaces. A multi-standard simulator has been developed to validate the architectural and design choices in terms of error rates at bit or packet level. The simulator takes into account implementation non-idealities and performs all tests to be passed to comply with the given standards. It also hints at the need for implementation margins as well as at possible optimization between different RF-blocks. The final solution, still under design, will consists of two chips, one including the TX and the other the RX for all the above standards. The cellular (plus Blue-tooth) transmitter relies on a Linear amplification with Non-linear Component (LINC) architecture that uses direct modulation of the carrier. This allows power saving because DAC and up-conversion mixers are not required. The WLAN (plus BlueTooth) transmitter adopts a direct-conversion architecture that implements an internal output matching over all the frequency bands while maintaining good system efficiency. The same building blocks are used for all standards, saving power and chip area. The cellular receiver architecture is able to reconfigure between Low-IF for GSM and direct conversion for UMTS and Blue-tooth. The key aspects in achieving the specs in a fully integrated fashion are a mixer with a very high dynamic range, a careful control of DC offsets and a highly tunable VCO. The WLAN receiver also uses direct-conversion with a Low Noise Amplifier based on a common gate topology that uses positive feedback through integrated transformers to improve input matching and noise. The frequency down-converter uses current driven passive mixers to achieve low 1/f noise corner, and high linearity with low power consumption. Finally, the base-band blocks can be shared among all the standard, thanks to their high reconfigurability. The paper describes the ideas behind the key RF blocks and some details of circuit implementation. Experimental measurements from sub-blocks in a 0.13 µm CMOS technology are presented and discussed. Abstract Feature IEEE CIRCUITS AND SYSTEMS MAGAZINE

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