High-end microprocessors now tend to be superscalar, to execute operations out of order, and to support shared memory among multiple processors. Verifying the functionality of such a microprocessor using simulation requires many stages, from tests of simple portions of the design, through simple tests of a single processor to complex tests of multiple pracessors. We followed this strategy using some already existing tools and writing some new tests and tools. We describe in this paper the general strategy and the tool set we created to perform the final simulation stage of design verification: running complex tests on a model of a multiprocessor system. This tool set operates on the principle that tests which mimic real programs are more likely to uncover errors that customers would encounter. Our results show that random realistic tests can get better coverage of common multiprocessor scenarios in fewer cycles than purely random tests.
software/hardware co-designers to fully utilize the underlying hardware, modify it or extend it based on their needs. In this paper, we introduce the vision of the MareNostrum Experimental Exascale Platform (MEEP), an Open Source platform enabling software and hardware stack experimentation targeting the High-Performance Computing (HPC) ecosystem. MEEP is built with state-of-the-art FPGAs that support PCIe and High Bandwidth Memory (HBM), making it ideal to emulate chiplet-based HPC accelerators such as ACME, at the chip, package, and/or system level. MEEP provides an FPGA Shell containing standardized interfaces (I/O and memory), enabling an emulated accelerator to communicate with the hardware of the FPGA and ensures quick integration. The first demonstration of MEEP is mapping a new accelerator, the Accelerated Compute and Memory Engine (ACME), on to this digital laboratory. This enables exploration of this novel disaggregated architecture, which separates the computation from the memory operations, optimizing the accelerator for both dense (compute-bound) and sparse (memory-bandwidth bound) workloads. Dense workloads focus on the computational capabilities of the engine, while dedicated processors for memory accesses optimize non-unit stride and/or random memory accesses required by sparse workloads. MEEP is an open source digital laboratory that can provide a future environment for full-stack co-design and pre-silicon exploration. MEEP invites software developers and hardware engineers to build the application, compiler, libraries and the hardware to solve future challenges in the HPC, AI, ML, and DL domains.
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