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The prospects for the analysis of τ channels at the SUSY benchmark point SPS1a', especially from e + e − →τ + 1τ − 1 and e + e − →τ + 2τ − 2 , have been studied in full simulation of the ILD detector concept foreseen for the International Linear Collider. All accessible SUSY channels as well as all Standard Model backgrounds were generated at a centre-of-mass energy E CM S =500 GeV, including the beam energy spectrum and beam backgrounds expected for nominal ILC beam parameters. With an integrated luminosity of 500 fb −1 delivered to the experiment, the masses of theτ 1 andτ 2 can be measured to 107.73 +0.03 −0.05 GeV ± 1.1·δMχ0 1 and 183 +11 −5 GeV ± 18·δMχ0 1 , respectively, while the true values in SPS1a' are 107.9 GeV and 194.9 GeV, respectively. This corresponds to δMτ 1 /Mτ 1 ∼ 0.1 % and δMτ 2 /Mτ 2 ∼ 3 % with reasonable assumptions on δMχ0 1 . The cross sections forτ 1 andτ 2 pair production could be obtained with a precision of 3.1 % and 4.2 %, respectively. Combining the mass and cross section measurement in theτ 2 channel allows to determine the LSP mass with a relative error of 1.7 %, assuming a knownτ mixing angle. Inτ 1 → τχ 0 1 decays, the τ polarisation is measured to be 91 ± 9 % and 86 ± 5 % in the π and ρ decay channels of the τ , respectively. The true value in the simulated SPS1a' sample is 89.6 %.

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We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the detector, and a Bi-Phase Mark decoder chip to recover the control data and 40 MHz clock received optically by a PIN diode. We have successfully implemented both ASICs in 0.25 µm CMOS technology using enclosed layout transistors and guard rings for increased radiation hardness. We present results of the performance of these chips, including irradiation with 24 GeV protons up to 61 Mrad (2.3 x 10 15 p/cm 2 ).