Neural Network is used as a tool for estimating interconnection wire-length in VLSI standard cell placement problem. Conventional methods for estimating the interconnection wire-length viz.. Bounding Rectangle method, provide inaccurate estimate of the interconnection wire-length and does not depict die interconnection procedure in a layout and separates routing and placement tasks distinctly. The proposed mechanism utilizes the neural network characteristics in understanding the functional mapping between input and output, to estimate the interconnection wire-length. Experiments were performed for different number of cells with varying complexity of interconnections. In all the cases, the performance of the Neural Network is found to be superior to the results obtained using Bounding Rectangle procedure.
Cell placement in VLSI design is an NP-complete problem. In this paper, we have tried to solve the standard cell placement problem using the Hopfield neural network model. Furthermore, a new system of coupled recurrent neural networks, which was designed to eliminate the drawbacks of the Hopfield neural network, is introduced. The performance of Hopfield networks with discrete and graded neurons is also investigated. The energy function corresponding to the chosen representation is given and the weight matrix and the inputs needed for the network are also computed in this work. Several different combinations of parameters were examined to find the optimum set of parameters which results in better and faster convergence. To show the effectiveness of our methods, cell placement problems up to 30 cells are considered and the results are compared with the results obtained by a genetic algorithm. Our results show that a system of coupled neural networks could be an efficient way to overcome the limitation of recurrent neural networks which consider only bilinear forms of the energy function.
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