This paper describes the silicon microstrip modules in the barrel section of the SemiConductor Tracker (SCT) of the ATLAS experiment at the CERN Large Hadron Collider (LHC). The module requirements, components and assembly techniques are given, as well as first results of the module performance on the fully-assembled barrels that make up the detector being installed in the ATLAS experiment.
This paper describes the AC-coupled, single-sided, p-in-n silicon microstrip sensors used in the SemiConductor Tracker (SCT) of the ATLAS experiment at the CERN Large Hadron Collider (LHC). The sensor requirements, specifications and designs are discussed, together with the qualification and quality assurance procedures adopted for their production. The measured sensor performance is presented, both initially and after irradiation to the fluence anticipated after 10 years of LHC operation. The sensors are now successfully assembled within the detecting modules of the SCT, and the SCT tracker is completed and integrated within the ATLAS Inner Detector. Hamamatsu Photonics Ltd supplied 92.2% of the 15,392 installed sensors, with the remainder supplied by CiS.
The ABCD3TA is a 128-channel ASIC with binary architecture for the readout of silicon strip particle detectors in the Semiconductor Tracker of the ATLAS experiment at the Large Hadron Collider (LHC). The chip comprises fast front-end and amplitude discriminator circuits using bipolar devices, a binary pipeline for first level trigger latency, a second level derandomising buffer and data compression circuitry based on CMOS devices. It has been designed and fabricated in a BiCMOS radiation resistant process. Extensive testing of the ABCD3TA chips assembled into detector modules show that the design meets the specifications and maintains the required performance after irradiation up to a total ionising dose of 10 Mrad and a 1-MeV neutron equivalent fluence of 2×1014 n/cm2, corresponding to 10 years of operation of the LHC at its design luminosity. Wafer screening and quality assurance procedures have been developed and implemented in large volume production to ensure that the chips assembled into modules meet the rigorous acceptance criteria
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