The Rectenna (RECTifying antENNA), which was first demonstrated by William C. Brown in 1964 as a receiver for microwave power transmission, is now increasingly researched as a means of harvesting solar radiation. Tapping into the growing photovoltaic market, the attraction of the rectenna concept is the potential for devices that, in theory, are not limited in efficiency by the Shockley-Queisser limit. In this review, the history and operation of this 40-year old device concept is explored in the context of power transmission and the ever increasing interest in its potential applications at THz frequencies, through the infra-red and visible spectra. Recent modelling approaches that have predicted controversially high efficiency values at these frequencies are critically examined. It is proposed that to unlock any of the promised potential in the solar rectenna concept, there is a need for each constituent part to be improved beyond the current best performance, with the existing nanometer scale antennas, the rectification and the impedance matching solutions all falling short of the necessary efficiencies at THz frequencies. Advances in the fabrication, characterisation and understanding of the antenna and the rectifier are reviewed, and common solar rectenna design approaches are summarised. Finally, the socio-economic impact of success in this field is discussed and future work is proposed.

For the first time, the I-V-T dataset of a Schottky diode has been accurately modelled, parameterised, and fully fit, incorporating the effects of interface inhomogeneity, patch pinch-off and resistance, and ideality factors that are both heavily temperature and voltage dependent. A Ni/SiC Schottky diode is characterised at 2 K intervals from 20 to 320 K, which, at room temperature, displays low ideality factors (n < 1.01) that suggest that these diodes may be homogeneous. However, at cryogenic temperatures, excessively high (n > 8), voltage dependent ideality factors and evidence of the so-called "thermionic field emission effect" within a T0-plot, suggest significant inhomogeneity. Two models are used, each derived from Tung's original interactive parallel conduction treatment of barrier height inhomogeneity that can reproduce these commonly seen effects in single temperature I-V traces. The first model incorporates patch pinch-off effects and produces accurate and reliable fits above around 150 K, and at current densities lower than 10 À5 A cm À2. Outside this region, we show that resistive effects within a given patch are responsible for the excessive ideality factors, and a second simplified model incorporating these resistive effects as well as pinch-off accurately reproduces the entire temperature range. Analysis of these fitting parameters reduces confidence in those fits above 230 K, and questions are raised about the physical interpretation of the fitting parameters. Despite this, both methods used are shown to be useful tools for accurately reproducing I-V-T data over a large temperature range. V

As GaN technology continues to gain popularity, it is necessary to control the ohmic contact properties and to improve device consistency across the whole wafer. In this paper, we use a range of submicron characterization tools to understand the conduction mechanisms through the AlGaN/GaN ohmic contact. Our results suggest that there is a direct path for electron flow between the two dimensional electron gas and the contact pad. The estimated area of these highly conductive pillars is around 5% of the total contact area. (C) 2011 American Institute of Physics. [doi:10.1063/1.3661167

Molybdenum (Mo)/4H-silicon carbide (SiC) Schottky barrier diodes have been fabricated with a phosphorus pentoxide (P 2 O 5 ) surface passivation treatment performed on the SiC surface prior to metallization. Compared to the untreated diodes, the P 2 O 5 -treated diodes were found to have a lower Schottky barrier height by 0.11 eV and a lower leakage current by two to three orders of magnitude. Physical characterization of the P 2 O 5 -treated Mo/SiC interfaces revealed that there are two primary causes for the improvement in electrical performance. First, transmission electron microscopy imaging showed that nanopits filled with silicon dioxide had formed at the surface after the P 2 O 5 treatment that terminates potential leakage paths. Second, secondary ion mass spectroscopy revealed a high concentration of phosphorus atoms near the interface. While only a fraction of these are active, a small increase in doping at the interface is responsible for the reduction in barrier height. Comparisons were made between the P 2 O 5 pretreatment and oxygen (O 2 ) and nitrous oxide (N 2 O) pretreatments that do not form the same nanopits and do not reduce leakage current. X-ray photoelectron spectroscopy shows that SiC beneath the deposited P 2 O 5 oxide retains a Si-rich interface unlike the N 2 O and O 2 treatments that consume SiC and trap carbon at the interface. Finally, after annealing, the Mo/SiC interface forms almost no silicide, leaving the enhancement to the subsurface in place, explaining why the P 2 O 5 treatment has had no effect on nickel-or titanium-SiC contacts.

The physical and electrical properties of Si/SiC heterojunctions formed by direct wafer bonding are presented. Atomic force microscopy ͑AFM͒ and imaging reveal an improved bonding quality when Si wafers are transferred to on-axis substrates as opposed to off-axis epitaxial layers. AFM analysis of the bonded wafer achieves a smoother surface when compared to molecular beam epitaxy-grown Si layers. A reduced roughness of only 5.8 nm was measured for bonded wafers. Current-voltage measurements were used to extract the rectifying characteristics of Si/SiC heterojunctions. These Si layers could lead to improved high quality and reliable SiO 2 gate oxides.

In this article Schottky barrier diodes comprising of a n-n Germanium-Silicon Carbide (Ge-SiC) heterojunction are electrically characterised. Circular transmission line measurements prove that the nickel front and back contacts are ohmic, isolating the Ge/SiC heterojunction as the only contributor to the Schottky behaviour. Current-voltage plots taken at varying temperature (IVT) reveal that the ideality factor (n) and Schottky barrier height (Φ) are temperature dependent and that incorrect values of the Richardson constant (A * * ) are being produced, suggesting an inhomogeneous barrier. Techniques originally designed for metal-semiconductor SBH extraction are applied to the heterojunction results to extract values of Φ and A * * that are independent of temperature. The experimental IVT data is replicated using the Tung model. It is proposed that small areas, or patches, making up only 3% of the total contact area will dominate the I-V results due to their low SBH of 1.033 eV. The experimental IVT data is also analysed statistically using the extracted values of Φ to build up a Gaussian distribution of barrier heights, including the standard deviation and a mean SBH of 1.126 eV, which should be analogous to the SBH extracted from capacitance-voltage (C-V) measurements. Both techniques yield accurate values of A * * for SiC. However, the C-V analysis did not correlate with the mean SBH as expected.

. (2012) A study of temperature-related non-linearity at the metal-silicon interface. Journal of Applied Physics, Vol.112 . Article no. 114513 Permanent WRAP url: http://wrap.warwick.ac.uk/52407 Copyright and reuse:The Warwick Research Archive Portal (WRAP) makes the work of researchers of the University of Warwick available open access under the following conditions. Copyright © and all moral rights to the version of the paper presented here belong to the individual author(s) and/or other copyright owners. To the extent reasonable and practicable the material made available in WRAP has been checked for eligibility before being made available.Copies of full items can be used for personal research or study, educational, or not-forprofit purposes without prior permission or charge. Provided that the authors, title and full bibliographic details are credited, a hyperlink and/or URL is given for the original metadata page and the content is not changed in any way. The version presented here may differ from the published version or, version of record, if you wish to cite this item you are advised to consult the publisher's version. Please see the 'permanent WRAP url' above for details on accessing the published version and note that access may require a subscription.For more information, please contact the WRAP Team at: wrap@warwick.ac.uk A study of temperature-related non-linearity at the metal-silicon interface.A study of temperature-related non-linearity at the metal-silicon interface. In this paper, we investigate the temperature dependencies of metal-semiconductor interfaces in an effort to better reproduce the current-voltage-temperature (I-V-T) characteristics of any Schottky diode, regardless of homogeneity. Four silicon Schottky diodes were fabricated for this work, each displaying different degrees of inhomogeneity; a relatively homogeneous NiV/Si diode, a Ti/Si and Cr/Si diode with double bumps at only the lowest temperatures, and a Nb/Si diode displaying extensive non-linearity. The 77-300 K I-V-T responses are modelled using a semi-automated implementation of Tung's electron transport model, and each of the diodes are well reproduced. However, in achieving this, it is revealed that each of the three key fitting parameters within the model display a significant temperature dependency. In analysing these dependencies, we reveal how a rise in thermal energy "activates" exponentially more interfacial patches, the activation rate being dependent on the carrier concentration at the patch saddle point (the patch's maximum barrier height), which in turn is linked to the relative homogeneity of each diode. Finally, in a review of Tung's model, problems in the divergence of the current paths at low temperature are explained to be inherent due to the simplification of an interface that will contain competing defects and inhomogeneities.

This paper describes the thermal oxidation of Si/SiC heterojunction structures, produced using a layer-transfer process, as an alternative solution to fabricating SiC metal-oxide-semiconductor ͑MOS͒ devices with lower interface state densities ͑D it ͒. Physical characterization demonstrate that the transferred Si layer is relatively smooth, uniform, and essentially monocrystalline. The Si on SiC has been totally or partially thermally oxidized at 900-1150°C. D it for both partially and completely oxidized silicon layers on SiC were significantly lower than D it values for MOS capacitors fabricated via conventional thermal oxidation of SiC. The quality of the SiO 2 , formed by oxidation of a wafer-bonded silicon layer reported here has the potential to realize a number of innovative heterojunction concepts and devices, including the fabrication of high quality and reliable SiO 2 gate oxides.