Approximate computing is a promising technique for energy-efficient Very Large Scale Integration (VLSI) system design. It is best suited for error-resilient applications such as signal processing and multimedia. Approximate computing reduces accuracy but still provides significant and faster results with lower power consumption. This is attractive to arithmetic circuits. In this article, various novel design approaches of approximate 4-2 and 5-2 compressors have been proposed for reduction of the partial product stages in multiplication. Three approximate 8 × 8 Dadda multiplier designs using three novel approximate 4-2 compressors and two approximate 8 × 8 Dadda multiplier designs using two novel approximate 5-2 compressors have proposed. The synthesis results show that the proposed designs achieved significant accuracy improvement together with power and delay reductions compared to the existing approximate designs.
CCS Concepts: r Computing methodologies; • Hardware → Very large scale integration designAdditional Key Words and Phrases: Approximate computing, 4-2 compressor, 5-2 compressor, dadda multiplier ACM Reference Format: Anusha Gorantla and Deepa P. 2017. Design of approximate compressors for multiplication.
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