This paper presents a complete set of blocks implemented in the popular MATLAB SIMULINK environment, which allows designers to perform time-domain behavioral simulations of switched-capacitor (SC) sigma-delta (61) modulators. The proposed set of blocks takes into account most of the SC 61 modulator nonidealities, such as sampling jitter, noise, and operational amplifier parameters (white noise, finite dc gain, finite bandwidth, slew rate and saturation voltages). For each block, a description of the considered effect as well as all of the implementative details are provided. The proposed simulation environment is validated by comparing the simulated behavior with the experimental results obtained from two actual circuits, namely a second-order low-pass and a sixth-order bandpass SC 61 modulator.
SUMMARYThis paper describes the design and the implementation of a 6th-order bandpass modulator to be used for IF digitizing at 10:7 MHz of a broadcasting FM radio signal. The modulator is sampled at 37:05 MHz. This sampling frequency value allows to optimize both modulator and overall receiver channel performance. The modulator has been implemented in a standard double-poly 0:35 m CMOS technology using switched capacitor (SC) technique and consumes 116 mW from a single 3:3 V power supply. The modulator features 75 dB dynamic range and 66 dB peak-SNR within a 200 kHz bandwidth (FM bandwidth). Third-order intermodulation products are suppressed by −78 dBc.
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