This paper presents the potentialities of deep submicron CMOS technologies for millimeter-wave applications. The target applications are firstly overviewed. Then, the nanometer bulk and SOI CMOS technology offer is presented, presenting integration solutions that take benefit of the intrinsic performances of the active device while minimizing the loss effects introduced by the BEOL. Finally, perspectives regarding future challenges in terms of system integration are discussed.
This paper presents the design of a distributed voltage controlled oscillator (DVCO). This oscillator has been designed in a low-cost low-power standard STMicroelectronics 65nm CMOS process. The DVCO achieves a tuning range from 9.6GHz to 11.6GHz, a phase noise better than -lOldBc/Hz at lMHz offset from the carrier and a total power consumption of 29mW.
Two BiFET LNAs are here reported, implemented in a 0.25 lm BiCMOS technology from ST Microelectronics. First of them, dedicated to WCDMA standard, depicts a 15.5 and 2.85 dB, S 21 and noise figure (NF), respectively, under 2 mA current consumption. The second realization operates at 23 GHz for Mini-Link application. It provides a 14 dB gain and 7 dB at 22 GHz NF for an 8.2 mA current consumption under 2.5 V. Both circuits were designed according to a design flow, here depicted, based on input matching, NF and gain optimisation. A large part of the article also deals with high frequency layout considerations. Indeed useful techniques dedicated to integrated microstrip waveguides and RF inter-connections are proposed based on 3D electromagnetic field simulations. Keywords BiFET Á LNA Á Cascade Á Design flow 2 The Bifet LNA configurationCascade configuration is well known to achieve both high gain and stability through a good reverse isolation.
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