When dealing with production of Flip Chip Packages in semiconductor packaging, the angle between the die and package substrate is critical for maintaining product yield and reliability. Current outgoing quality checks for die tilt can be time consuming to measure heights via point to point measurement techniques. Existing die tilt measurement approaches can also have reproducibility issues from user to user. Shadow moiré technology is a full field optical inspection technique commonly used for flatness characterization in the semiconductor industry, particularly at elevated temperatures. Two limitations to shadow moiré apply when discussing outgoing QC of die tilt: 1) shadow moiré requires a diffuse reflective surface for measurement; 2) shadow moiré is unable to measure sudden step heights. This paper discusses applications techniques and real world examples to overcome or mitigate the limitations of shadow moiré technology and use this full field and high speed measurement technology to measure die tilt. Using shadow moiré for this measurement technology can reduce measurement and user time as well as improve consistency of measurements from user to user. As shadow moiré tools are often used for at temperature flatness measurements, this added application can reduce the number of different measurement tools needed in QA labs.

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Surface mount components are commonly evaluated for out-of-plane warpage levels across reflow temperatures. Decision making for acceptable warpage levels is primarily made based on signed warpage levels of a single component surface, per industry standards. This paper discusses how a single signed warpage value is an oversimplified and incomplete way to describe a surface mount attachment between two mating surfaces that change in shape over temperature. Specific examples are shown where current industry standard gauges for thermal warpage are misleading. Issues include current industry standard equations for calculation of signed warpage. Optimal understanding of effects of warpage on surface mount attachment includes analysis of both mating surfaces under the same thermal and test conditions. Examples are shown of dual surface analysis, where gap between mating surfaces becomes the critical value in place of signed warpage. Evaluating both sides of two attaching surfaces is the optimal way to understand surface mount defects related to thermal warpage. However, many companies dealing with SMT will not have reasonable access to the surfaces to which their products will be attached. The paper goes on to discuss different approaches to more effectively quantify a single surface over temperature. This includes, but is not limited to, adding equations for signal strength values to currently established signed warpage standards.