Metal-oxide-semiconductor ͑MOS͒ devices using a thermally robust HfN/HfO 2 gate stack were fabricated. The equivalent oxide thickness of HfN/HfO 2 gate stack has been aggressively scaled down to 0.75 and 0.95 nm for MOS capacitors and metal-oxidesemiconductor field effect transistors, respectively, after a thermal budget required by the conventional complementary metaloxide-semiconductor gate-first process. The reliability issues such as time-dependent dielectric breakdown ͑TDDB͒ and bias temperature instability ͑BTI͒ of the HfN/HfO 2 devices are studied. The stress electric-field-dependent TDDB characteristics are demonstrated and explained by a model taking into account the high energetic carrier trapping in the HfO 2 and at the HfO 2 /Si interfacial layer. The polarity dependent BTI characteristics are observed which can be explained by a generalized reactiondiffusion model. These intrinsic reliability characteristics are correlated with the low pre-existing charge traps in HfO 2 gate stack resulting from a high temperature postdeposition annealing of the HfN/HfO 2 gate stack.
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