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Record-low contact resistivity (ρ c ) for n-Si, down to 1.5×10 -9 Ω•cm 2 , is achieved on Si:P epitaxial layer. We confirm that Ti silicidation reduces the ρ c for n-Si, while an additional Ge pre-amorphization implantation (PAI) before Ti silicidation further extends the ρ c reduction. In situ doped Si:P with P concentration of 2×10 21 cm -3 is used as the substrate, and dynamic surface anneal (DSA) boosts P activation. In addition, TiO x based metal-insulator-semiconductor (MIS) contact is also studied on Si:P but is found to suffer from low thermal stability.

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As contact resistance becomes a bottle-neck in scaled CMOS devices, there is a need for source/drain epitaxy with maximum dopant concentrations and optimized contacting schemes. In this paper we discuss the use of highly doped Si:P layers for the Source/Drain formation in Si bulk FinFETs. We report on the macroscopic and microscopic properties of the Si:P layers and discuss the details of the microstructure and the manifestation of Phosphorus-Vacancy complexes at high Phosphorus concentrations. We analyze how a post-epi thermal budget like spike or laser annealing modifies the microstructure and leads to an enhanced P activation and diffusion. We also zoom in on some of the integration aspects of the Si:P layers and discuss the benefit of the high-P concentration for the contact resistivity and the final device performance.

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Accurate determination of contact resistivities (ρ c ) below 1 × 10 −8 · cm 2 is challenging. Among the frequently applied transmission line models (TLMs), circular TLM (CTLM) has a simple process flow, while refined TLM (RTLM) has a high ρ c accuracy at the expense of a more complex fabrication. In this letter, we will present a novel model-multiring CTLM (MR-CTLM), which combines the advantages of a simple process and a high ρ c extraction resolution. We fabricated ultralow-ρ c Ti/n-Si contacts and demonstrated the capability of MR-CTLM to extract the ρ c as low as 6.2 × 10 −9 · cm 2 with high precision.

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