This research work presents a novel architecture of an Ultra-Low-Power (ULP) based Hybrid Energy Harvester (HEH) consisting of multiple input sources such as kinetic, thermal and solar energy, harvested from passive human power. Having multiple ambient sources mitigates limitations caused by single sources especially for bodily-worn applications; however, this results in impedance mismatch among the different integrated sources. To overcome this limitation, the proposed ULP-HEH will use one power management unit with Maximum Power Point Tracking (MPPT) algorithm and impedance matching considerations to efficiently manage and combine power harvested from all three sources to achieve ULP consumptions. Among other crucial sub-modules of the ULP-HEH are its Asynchronous Finite State Machine (AFSM) cum resource sharing arbiter to prioritize and share energy sources for overall power reduction, an efficient rectification scheme for the piezoelectric input, an adaptive feedback for ULP conditioning, Zero-Current Switching (ZCS) for semi-lossless switching, a self-start circuit for low ambient startup, a Boost converter, a Buck regulator, a fuzzy-based micro-battery charger and a de-multiplexer to switch between harvesting or charging capabilities. All of which are implemented for maximum output extraction and minimal losses. This ULP-HEH will be developed in PSPICE software, Verilog coding under Mentor Graphics environment and later to be verified using Field Programmable Gate Array (FPGA) board before the final layout implementation in CMOS 0.13-µm process technology. This battery-less ULP-HEH is expected to deliver 3.0-5.0V of regulated voltage output from low ambient sources of 35 mV at startup. An efficiency of 90% with an output power of 650 µm is expected when all sources are summed. Also, this ULP-HEH is aimed at reducing power consumption to at least twice (<70 µW) of conventional approaches. The proposed ULP-HEH can be used for ULP bodily-worn electrical gadgets, wearable biomedical devices or to charge micro-batteries for portable electronic devices
This paper reviews CMOS based charge pump topologies used within autonomous embedded micro-systems. These charge pump structures have evolved from its simplistic diode-tied, single-branches with major threshold drops to exponential type, dual-branches with sophisticated gate and substrate control for lower voltage operation. Published charge pumps are grouped based on architecture, operation principles and pump optimization techniques with their pros and cons compared and results contrasted. The various charge pump topologies and schemes used are considered based on pumping efficiency, power efficiency, charge transferability, circuit complexity, pumping capacitors, form factor and minimum supply voltages with an optimum load. This article concludes with an overview of suitable techniques and recommendations that will aid a designer in selecting the most suitable charge pump topology especially for low ambient micro energy harvesting applications.
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