In this paper we are interested in safety-critical real-time applications implemented on distributed architectures supporting the TimeSensitive Networking (TSN) standard. The ongoing standardization of TSN is an IEEE effort to bring deterministic real-time capabilities into the IEEE 802.1 Ethernet standard supporting safety-critical systems and guaranteed Quality-of-Service. TSN will support TimeTriggered (TT) communication based on schedule tables, AudioVideo-Bridging (AVB) flows with bounded end-to-end latency as well as Best-Effort messages. We first present a survey of research related to the optimization of distributed cyber-physical systems using real-time Ethernet for communication. Then, we formulate two novel optimization problems related to the scheduling and routing of TT and AVB traffic in TSN. Thus, we consider that we know the topology of the network as well as the set of TT and AVB flows. We are interested to determine the routing of both TT and AVB flows as well as the scheduling of the TT flows such that all frames are schedulable and the AVB worst-case end-to-end delay is minimized. We have proposed an Integer Linear Programming (ILP) formulation for the scheduling problem and a Greedy Randomized Adaptive Search Procedure (GRASP)-based heuristic for the routing problem. The proposed approaches have been evaluated using several test cases.

In this article, we advocate for the use of IEEE 802.1 Time-Sensitive Networking (TSN) as deterministic transport for the network layer of fog computing in industrial automation. We give an overview of the relevant TSN protocol services and motivate the use of TSN. We propose a configuration agent architecture based on IEEE 802.1Qcc and OPC Unified Architecture (OPC UA), capable of performing runtime network configuration. We briefly present the configuration challenges for scheduled networks (considering a subset of TSN mechanisms), and illustrate one problem: the configuration of schedule tables of such networks for hard real-time control applications. We propose a list scheduling-based heuristic to solve this problem. Our evaluation and comparison to previous work demonstrate the feasibility of reconfiguring the scheduled network at runtime for industrial applications within the fog.

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Abstract-Microfluidic laboratories-on-chip (LoCs) are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis onchip. There are several types of LoCs, each having its advantages and limitations. In this paper we are interested in flow-based LoCs, in which a continuous flow of liquid is manipulated using integrated microvalves. By combining several microvalves, more complex units, such as micropumps, switches, mixers and multiplexers, can be built. We consider that the architecture of the LoC is given, and we are interested in synthesizing an implementation, consisting of the binding of operations in the application to the functional units of the architecture, the scheduling of operations and the routing and scheduling of the fluid flows, such that the application completion time is minimized. To solve this problem, we propose a List Schedulingbased Application Mapping (LSAM) framework and evaluate it by using real-life as well as synthetic benchmarks. When biochemical applications contain fluids that may adsorb on the substrate on which they are transported, the solution is to use rinsing operations for contamination avoidance. Hence, we also propose a rinsing heuristic, which has been integrated in the LSAM framework.

Microfluidic biochips are replacing the conventional biochemical analyzers and are able to integrate the necessary functions for biochemical analysis on-chip. In this paper we are interested in flow-based biochips, in which the fluidic flow manipulated using integrated microvalves, which are controlled from external pressure sources, connected to "control pins". By combining several microvalves, more complex units, such as micropumps, switches, mixers, and multiplexers, can be built. The current practice is to design these biochips by hand in drawing tools such as AutoCAD, and to program them manually by individually controlling each valve. Recent research has proposed top-down physical synthesis Computer-Aided Design tools, and programming languages and compilation techniques to automatically derive the control signals for the valve actuations. However, researchers have so far assumed that the number of ports used to drive the valves (control pins) is unlimited, which has resulted in very expensive, bulky and energy consuming off-chip control and infeasible control routes in the biochip control layer. In this paper, we propose a methodology to reduce the number of control pins required to run a biochemical application. We focus on the compilation task, where the strategy is to delay operations, without missing their deadlines, such that the sharing of control signals is maximized. The evaluation shows a significant reduction in the number of control pins required. I.

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