Abstract-A mathematical bit error rate (BER) model for upsets in memories protected by error-correcting codes (ECCs) and scrubbing is derived. This model is compared with expected upset rates for sub-100-nm SRAM memories in space environments. Because sub-100-nm SRAM memory cells can be upset by a critical charge ( crit ) of 1.1 fC or less, they may exhibit significantly higher upset rates than those reported in earlier technologies. Because of this, single-bit-correcting ECCs may become impractical due to memory scrubbing rate limitations. The overhead needed for protecting memories with a triple-bit-correcting ECC is examined relative to an approximate 2X "process generation" scaling penalty in area, speed, and power.
This paper investigates total ionizing dose (TID) effects in top-gated epitaxial graphene field-effect-transistors (GFETs). Measurements reveal voltage shifts in the current-voltage (I-V) characteristics and degradation of carrier mobility and minimum conductivity, consistent with the buildup of oxide-trapped charges. A semi-empirical approach for modeling radiation-induced degradation in GFETs effective carrier mobility is described in the paper. The modeling approach describes Coulomb and short-range scattering based on calculations of charge and effective vertical field that incorporate radiation-induced oxide trapped charges. The transition from the dominant scattering mechanism is correctly described as a function of effective field and oxide trapped charge density. Comparison with experimental data results in good qualitative agreement when including an empirical component to account for scatterer transparency in the low field regime.
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