A Sr-based metal–organic framework exhibits an intrinsic low dielectric constant after removing the water molecules. A low dielectric constant and high thermal stability make this compound a candidate for use as a low-k material.

Human activity recognition (HAR) is essential for understanding people’s habits and behaviors, providing an important data source for precise marketing and research in psychology and sociology. Different approaches have been proposed and applied to HAR. Data segmentation using a sliding window is a basic step during the HAR procedure, wherein the window length directly affects recognition performance. However, the window length is generally randomly selected without systematic study. In this study, we examined the impact of window length on smartphone sensor-based human motion and pose pattern recognition. With data collected from smartphone sensors, we tested a range of window lengths on five popular machine-learning methods: decision tree, support vector machine, K-nearest neighbor, Gaussian naïve Bayesian, and adaptive boosting. From the results, we provide recommendations for choosing the appropriate window length. Results corroborate that the influence of window length on the recognition of motion modes is significant but largely limited to pose pattern recognition. For motion mode recognition, a window length between 2.5–3.5 s can provide an optimal tradeoff between recognition performance and speed. Adaptive boosting outperformed the other methods. For pose pattern recognition, 0.5 s was enough to obtain a satisfactory result. In addition, all of the tested methods performed well.

Ultrathin channel trench junctionless poly-Si fieldeffect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness (T CH ) and gate length (L G ). These devices (L G = 0.5 µm) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high I ON /I OFF current ratio (10 6 A/A) and practically negligible drain-induced barrier lowering (∼0 mV/V). The I ON current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications. Index Terms-Trench junctionless field-effect transistor (trench JL-FET), nanowires (NWs), and three-dimensional (3-D).