Fish scale was decalcified and disaggregated and then collagen was prepared by limited pepsin digestion. The yields of collagens were very high on a dry weight basis; sardine 50.9%, red sea bream 37.5% and Japanese sea bass 41.0%, respectively. These scale collagens were heterotrimers with a chain composition of (a1) 2 a2. Although the denaturation temperature of the collagen was lower than land animal collagen, fish scales will have potential as an important collagen source for use in various industries.

No abstract

Recent years, the information security is emphasized with a development ofInternet systems. In the measures as securing digital information, there are cryptosystems that protect secrecy of digital documents and digital signature scheme that ensure validity of digital documents. In the case of reality, i.e. hardware devices are used in cryptosystems, there is a possibility that secret information leaks via sidechannel. Simple Power Analysis (SPA) attacks are one of the side-channel attacks. To prevent a SPA, one of the sidechannel attacks, the Montgomery Powering Ladder (MPL) method has been considered as one of the countermeasures. In this paper, we show that a naïve implementation of the MPL method is vulnerable for SPA attacks by observing the power consumption of the controller block of the RSA hardware. Furthermore, in order to avoid such information leakage, we propose a new hardware architecture for RSA using the MPL method to enhance SPA resistance.

High speed DSP blocks present in the modern FPGAs can be used to implement prime field multiplication to accelerate Elliptic Curve scalar multiplication in prime fields. However, compared to logic slices, DSP blocks are scarce resources, hence its usage needs to be optimized. The asymmetric 25 × 18 signed multipliers in FPGAs open a new paradigm for multiplier design, where operand decomposition becomes equivalent to a tiling problem. Previous literature has reported that for asymmetric multiplier, it is possible to generate a tiling (known as non-standard tiling) which requires less number of DSP blocks compared to standard tiling, generated by school book algorithm. In this paper, we propose a generic technique for such tiling generation and generate this tiling for field multiplication in NIST specified curves. We compare our technique with standard school book algorithm to highlight the improvement. The acceleration in ECC scalar multiplication due to the optimized field multiplier is experimentally validated for P-256. The impact of this accelerated scalar multiplication is shown for the key encapsulation algorithm PSEC-KEM (Provably Secure Key Encapsulation Mechanism).