In this paper, we design an all-optical Pseudo Random Binary Sequence (PRBS) generator in parallel configuration for operating rate multiplication purposes. The sequential circuit comprises of several clocked D flip-flops, XOR gates and multiplexers implemented using microring resonator (MRR)-based switches. The proposed design is demonstrated and validated through simulations for 500 Gb/s and 400 Gb/s rate doubling and quadrupling, respectively, of a 5-bit degree PRBS. The MRR critical operating parameters are also optimized against performance metrics through numerical investigation.
All-optical synchronous and asynchronous binary up counters that employ silicon micro-ring resonator-based T flip-flops are proposed. An alternative approach to design all-optical synchronous and asynchronous binary up counters is also demonstrated using fewer optical components. The proposed design is theoretically realized in MATLAB simulation software at a very high operational speed of 260 Gbps. The performance of this design is validated through amplitude difference, contrast ratio, extinction ratio, amplitude modulation, on-off ratio, etc. The optimized values of the micro-ring resonator are achieved through numerical simulation, which will help to implement the proposed design practically.
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