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Virtual platforms are widely applied for embedded software protoyping and analysis. We introduce here an automatic annotation and estimation technique for the dynamic time analysis of embedded software. The annotation technique automatically inserts marks into the software, which can later be identified at assembler code level in order to back-annotate them with timing or power information. Our graph based technique applies automated labeling of basic blocks to aid in efficient construction of basic blocks for the disassembler. The graph is compacted for efficiency and a novel graph traversal technique is applied to estimate the flow cost. The timing estimates are later back annotated to the source code with the help of identifiers which are then used in SystemC simulations. Our technique can be easily deployed across variety of architectures as it is compiler-independent and does not implement any architecture specific features to estimate the time. The option to back-annotate the timing estimates avoids the requirement to recompile the entire model to get the same information before simulation.

Virtual platforms are gaining significant importance in early design tests of embedded software as it helps to redesign or optimize the system well advance in time and keeps flaws minimal in the production stage. As embedded system's size gets smaller, expensive resources like memory are limited. Hence memory needs to be managed efficiently and optimally. Memory leak is a serious issue that leads to wastage of expensive memory. We propose a novel approach to detect memory leaks in early design stages of soft real-time systems with no garbage collection. Our approach utilizes a virtual platform modeled in SystemC at an abstract level using Transaction Level Modeling. The software under test is run on top of this model. Potential memory leaks in the software are detected by applying a novel hybrid method combining both static and dynamic approaches. In early design stages where a real execution environment and complete executable software are unavailable, a simulation environment and a virtual platform are necessary. Virtual platforms provide flexibility to change the target architecture to be tested. Our proposed approach runs on the virtual platform we implement. This makes our approach faster and provides early results.

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Abstract:As embedded software becomes complex and time to production needs to be minimized, early fixing of flaws in a software design is important. Memory leaks are the most important memory-related problems commonly occurring in embedded software development. We propose a novel hybrid automated memory leak detection approach for soft real-time embedded system software. Our approach combines static and dynamic methodologies to overcome their individual limitations. The static phase generates potential memory leak warnings with the help of source code annotation and control flow graphs. The dynamic phase involves simulation of abstracted memory behaviour with data collected in an abstract memory model (AMM). Actual leaks are determined from the potential leak warnings generated in the static phase. The dynamic simulation phase makes our approach faster and enables early phase leak detection. Our approach is platform independent and evaluation shows that it is more accurate than existing tools.Keywords: hybrid memory leak detection; soft real-time system; abstract memory model; AMM; simulation; source code annotation; control flow graph; data dependency; memory leak rank; memory leak density. This paper is a revised and expanded version of a paper entitled 'Source code annotated memory leak detection for soft real time embedded systems with resource constraints' presented at

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