The morphological and thermal stability of conducting NiSi films formed on Si(001) are significantly enhanced by pre-implantation of the Si wafer with BF2+. In the absence of F, the maximum silicidation temperature Tmax is 650 °C; higher temperatures lead to the formation of the competing high-resistivity NiSi2 phase. Tmax, however, is increased to ⩾750 °C during NiSi formation on Si(001) implanted with 20 keV BF2+ at a dose of 5×1015 cm−2. The observed enhancement in NiSi thermal stability is due to F segregation to the silicide/Si(001) interface and silicide grain boundaries, which retards NiSi grain growth, leading to much smoother layers, and inhibits NiSi2 nucleation.

In this letter, a postgate CF4-plasma treatment is proposed and demonstrated on germanium (Ge) metal-oxide-semiconductor capacitors and the effects of fluorine (F) incorporation have been studied on both high-k∕Ge gate stacks without any surface passivation and with Si surface passivation. Our results show that F is effectively introduced into the gate stack by CF4 treatment and segregates near high-k∕Ge interface. Electrical characteristics such as frequency dispersion, interface state density (Dit), and gate leakage are improved after F incorporation. Interface quality of high-k∕Ge gate stack is further improved by combining Si surface passivation and postgate CF4 treatment, with its Dit as low as 4.85×1011cm−2eV−1.

The effects of Ti incorporation in a Ni film on the silicidation reaction as well as the structural and electrical properties of NiSi have been investigated. Experimental results from this work showed that the reaction-inhibiting effect of an interfacial oxide layer could be effectively overcome by Ti incorporation. It was found that, in the presence of a thin interfacial oxide ͑1-2 nm͒, the onset of the silicidation reaction occurs at 300°C with a Ni͑5 atom % Ti͒ alloy while the thin interfacial oxide effectively delays the silicidation reaction up to 700°C for pure Ni. It was found that Ti reacts with the interfacial oxide, yielding an altered oxide layer, which acts as a Ni-permeable diffusion membrane during silicidation. In addition to the dramatic effect on the interfacial reaction during silicide formation, Ti incorporation was also found to improve morphological and thermal stability of NiSi. As a result, Ni͑Ti͒-silicided p ϩ /n diodes ͑with/without an interfacial oxide͒ showed an improvement in junction integrity, as compared to pure Ni-silicided p ϩ /n diodes. It is believed that the ability to form silicide effectively even in the presence of an interfacial oxide, coupled with improved junction integrity, will greatly relieve constraints on processing conditions and significantly enhance manufacturing yield.The use of metallic silicides to reduce the gate and source/drain contact resistance is crucial in achieving high-speed device operation in advanced complementary metal oxide semiconductor ͑CMOS͒ devices. Recently, NiSi has been shown to be an attractive alternative to currently used silicides, i.e., TiSi 2 and CoSi 2 , for future 0.1 and sub-0.1 m generation CMOS devices due to its high conductivity, large processing window, low Si consumption, and ability to maintain low resistivity even for linewidths down to 0.1 m. 1-4 However, a number of process/integration issues, such as the sensitivity of NiSi formation to oxygen impurities ͑e.g., residual oxide on Si surface͒, 5 remain to be addressed and resolved before the full implementation of NiSi process in future sub-0.1 m generations of CMOS devices is realized.It is known that, like CoSi 2 , 6-9 the formation of NiSi is substantially suppressed or even completely inhibited if a thin interfacial oxide is present. 9 For example, it was reported that the presence of a thin native oxide effectively delays the formation of Ni-silicide up to 800°C. 10 This sensitivity of NiSi formation to the interfacial oxide often results in the formation of a rough silicide/Si interface, when the initial Si surface is partially oxidized, or even a complete failure to form NiSi if the initial Si surface is fully oxidized. While the failure to form NiSi would directly result in unacceptably high contact resistance on source/drain and gate regions, the formation of rough silicide/Si interface has been identified as the primary cause for anomalously large junction leakage on shallow junctions. 11 In addition, it has also been shown that NiSi is extremely sensitive to oxy...

We report the technique of controlled group V quantum well intermixing (QWI) in a compressively strained In0.76Ga0.24As0.85P0.15/In0.76Ga0.24As0.52P0.48 multiquantum well laser structure and its application to the fabrication of two-section tunable lasers. The blueshift of the band-gap energy was enhanced by capping the samples with films of SiO2 or low-temperature grown InP, while suppressed by a SixNy film with a refractive index of about 2.1. Spatially selective band-gap tuning was achieved by patterning the dielectric film into dot and strip arrays with different surface coverage. Time-of-flight secondary ion mass spectra showed that the enhanced blueshift was caused by the interdiffusion of group V atoms between the quantum wells and barriers. A group V interstitial interdiffusion mechanism is proposed for the sample capped with SiO2 and this is supported by the even more efficient intermixing induced by low-temperature InP, which contains a high concentration of excess phosphorus. A two-section tunable laser operating around 1.55 μm was fabricated using this QWI technology. A tuning range of about 10 nm was demonstrated by simply changing the current injected into the phase tuning section.

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