One of the key challenges of embedded system design is the management and conservation ofpower. Static power reduction methods such as synthesis ofefficient hardware and compilation for low power are applied at design time. In contrast, Dynamic Power Management (DPM) techniques leverage on the runtime characteristics to reduce power when systems are serving light workloads or are idle. Though much work has been done on profile-based CPU power management, similar efforts are relatively less for I/O devices. This paper proposes an algorithm for profile based power management of the peripherals for embedded computing systems. It enables suitable decisions for efficient operation of the peripherals considering both power and performance. The algorithm lends well for applications with both single and multiple independent peripherals.
In recent years, embedded systems have become increasingly more complex. This complexity is tackled in software by abstracting the underlying hardware using an embedded real-time operating system (RTOS) and a suitable Board Support Package (BSP). However, the RTOS imposes overheads on the CPU in return for the run-time support it provides. Modern embedded hardware often comprises multicore processors, unified core processors, soft-core processors, dedicated hardware logic, or even a system-on-chip. Each of these hardware options can be used to reduce the CPU overhead of the RTOS and numerous methods have been proposed in literature. Due to the large number of optimization options available and the need to meet strict time-to-market pressures, RTOS optimization needs to be a largely autonomous process. In this paper, we present a framework for automated applicationspecific optimization of embedded real-time operating systems. We identify the components of such a framework and discuss our prototype of the framework.
2.1 Advances in Embedded Systems 8 2.1.1 Advances in Embedded Hardware 8 2.1.1.1 More powerful embedded processors 9 2.1.1.2 Incorporation of reconfigurable hardware 12 2.1.1.3 Configurable system-on-chip and system-on-chip technologies 14 2.1.1.4 Soft-core CPU and Instruction Set Customization 16 2.1.1.5 Application Specific Instruction Processors (ASIP) 19 2.1.1.6 Summary 21 2.1.2 Advances In Embedded Software 21 2.1.2.1 Object Orientation in Embedded Software 22 2.1.2.2 Embedded JAVA 23 2.1.2.3 Embedded Middleware 25 2.1.2.4 Adoption of RTOS in more projects 26 2.1.2.5 Summary 27 2.1.3 Embedded Systems Design Tools And Methodologies 27 2.1.3.1 Use of Real-Time UML for software design modeling 28 2.1.3.2 Use of C and C++ for hardware design 28 2.1.4 Other Issues in Embedded Systems 29 2.1.4.1 Power Management 29 2.1.4.2 Adaptability & Flexibility 30 n
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