A configurable hardware implementation of Kanerva's Sparse Distributed Memory has been developed using advanced structures. The system consists of the host computer, address unit and memory unit. The address and memory units have been implemented with commercially available components to two functioning boards, and they perform the Hamming distance comparison and memory storage functions. In order to achieve effective hardware realization the units are designed for highly parallel processing. The host computer is used to edit, compile, and down-load the programs to be run in the units. The performance estimations are also presented.
This paper presents a high performance second order sigma-delta modulator for modem and ISDN analog to digital conversion applications. The major performance design limiting factors are demonstrated. It will be shown that a true 16-bit analog to digital (A/D) converter with single 5 V power supply for voice band can be realized with oversampling ratio of 512 and 16-bit dynamic range is achieved with oversampling ratio of 256. The die size of the proposed modulator using 2.5 micron CMOS technology is only 0.56 mm2.
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