We report on a new roadblock which will limit the gate oxide thickness scaling of MOSFETs. It is found that statistical distribution of direct tunnel leakage current through 1.2 to 2.8 nm thick gate oxides induces significant fluctuations in the threshold voltage and transconductance when the gate oxide tunnel resistance becomes comparable to gate poly-Si resistance. By calculating the measured tunnel current based on multiple scattering theory, it is shown that the device characteristics fluctuations will be problematic when the gate oxide thickness is scaled down to less than 1 nm.
It has been found that the rate of Si etching by hydrazine
(N2H4H2O) is drastically retarded by ion-beam
exposure. By utilizing this new phenomenon, a simple process of
fabricating nanopyramid arrays (NPAs) on a Si surface is
proposed. Two-dimensional arrays of dots and lines are written
directly on a Si substrate with 60 keV Si, P and BF2 ion beams
at doses of 1013–1015 cm-2. Subsequently, the Si
substrate is dipped in hydrazine solution, where unexposed regions
are selectively etched by hydrazine. Using this simple process,
130 nm convex NPAs with 200 nm pitch and 40 nm concave NPAs with
150 nm pitch can be fabricated easily. It is shown that the
electrical property of the apex of the pyramid can be controlled by
dopant ion irradiation. The cause of the retarded etch rate of
ion-beam-exposed Si by hydrazine is comprehensively discussed.
The inherent fluctuation of electrical properties in a fine semiconductor region has been successfully reduced for the first time by implanting a small number of dopant atoms by means of single ion implantation (SII) which enables us to implant dopant ions one by one into a fine semiconductor region until the necessary number is reached. Trimming of the conductance of a fine resistor which corresponds to an active region in semiconductor devices has been tried by using the SII. Firstly the conductance increase per one dopant atom in a sub-µm scale Si resistor was measured to be 18 nS/atom. Secondly very fine test resistors with a size of sub-µm were made by conventional device fabrication technology and the statistical distribution of conductance in the test devices was obtained. Then the number of single ions necessary to trim the conductance value to a certain value in the higher side of the initial distribution was implanted to each test resistor. The initial conductance fluctuation of 63% has been reduced to only 13%.
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