Programmable processors oer a high degree of exibility and are therefore increasingly being used in embedded systems. We introduce the formalism nML which is especially suited to describe such processors in terms of their instruction set, an nML description is directly related to the standard description as found in the usual programmer's manuals. The nML formalism is based on a mixed structural and behavioural model facilitating exact yet concise descriptions. The philosophy of nML is already applied in two approaches to retargetable code generation and instruction set simulation.
This paper describes how a modular machine description, which speci es the functionality and the binary representation of an instruction set, can be transformed into a hardware model. This model is built from few generic hardware entities (registers, memories, arithmetic/logic operators, selectors and connections) and may e v entually serve as an input to high-level hardware synthesis tools. The transformation steps on the way from the machine description to the hardware model are explained by giving an example.
The functional pro rammin language ALDiSP, which is special1 tailored to the nee& of DSfprogramming, is presented. ALDiS6 m c o y t e s data streams and an asynchronous control concept base on on1 one construct, the suspension. A comparison with traditional DZP languages like SILAGE is made. It is shown how ALDiSP pro rams can be translated into efficient code using the techniques of abstract interpretation and partial evaluation, in which a program is applied to symbolic input, resulting in usage informahon for all possible runs. This information is used to o timize the program by reconstructing it. Both the com ilation oFfunctions and the construction of a compile-time schedufe make use of this approach.
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