A multi-channel free-space micro-optical module for dense MCM-level optical interconnections has been designed and fabricated. Extensive modeling proves that the module is scalable with a potential for multi-Tb/s.cm 2 aggregate bit rate capacity while alignment and fabrication tolerances are compatible with present-day mass replication techniques. The micro-optical module is an assembly of refractive lensletarrays and a high-quality micro-prism. Both components are prototyped using deep lithography with protons and are monolithically integrated using vacuum casting replication technique. The resulting 16-channel high optical-grade plastic module shows optical transfer efficiencies of 46% and interchannel cross talks as low as-22 dB, sufficient to establish workable multi-channel MCM-level interconnections. This micro-optical module was used in a feasibility demonstrator to establish intra-chip optical interconnections on a 0.6µm CMOS opto-electronic field programmable gate array. This opto-electronic chip combines fully functional digital logic, driver and receiver circuitry and flip-chipped VCSEL and detector arrays. With this test-vehicle multi-channel on-chip data-communication has been achieved for the first time to our knowledge. The bit rate per channel was limited to 10Mb/s because of the limited speed of the chip tester.
It is our goal to demonstrate the viability of massively parallel optical interconnects between electronic VLSI chips. This is done through the development of the technology necessary for the realisation of such interconnections, and the definition and realisation of a systems architecture in which these interconnections play a meaningful role. Multi-FPGA systems have been identified as a good candidate for the introduction of low level optoelectronic interconnects, from both the systems and the purely demonstrator related points of view"].FPGAs are electronic components that can be programmed to implement arbitrary electronic designs. As programming can be done in-situ and repetitively, FPGAs are being applied in quickly growing numbers in a large variety of applications[21. They are currently being used as replacements for random logic in situations where ASIC design is not indicated; as configurable processors and coprocessors; and as fast prototyping platforms for real-time or near real-time prototyping of VLSI designs before actual chip fabrication. In these last two applications, invariably multi-FPGA systems are required. Not suprisingly, their flexibility (programmability) comes with a price. For a given silicon area, the sizes of designs that FPGAs can harbour are much smaller then ASIC implementations and to make things worse, FPGAs are frequently plagued by a lack of interconnect capabilities[31 . Multi-FPGA systems in particular suffer from the -lack of inter-chip interconnect capability. On the one hand, optoelectronic area-I/O for multi-FPGA systems would offer a definite advantage in terms of interconnect capability[41. On the other, the speed of the (programmable) electrical on-chip or off-chip interconnect system is lower than that of dedicated ASICs. As a result, optical interconnects, even if they are not optimised for latency, provide a viable substitute and extension of the electrical interconnect system in multi-FPGA systems[51.In demonstrator terms, FPGAs have the following advantages: only one type of silicon chip has to be designed and produced. Virtually the entire chip can be tested electrically before the hybridisation with the optical components takes place. FPGAs have a regular internal structure that blends well with the ultimate goal of regularly spaced and interlaced optical components across the surface of a silicon chip. FPGAs contain a lot of redundancy due to their programmability and regularity. This provides a badly needed robusmess against local defects in the demonstrator system. No prior limits are imposed onto the actual demonstrator functionality. FPGAs are generic components allowing implementation of several applications. FPGAs further allow a meaningful demonstration of logic-level optical interconnect, which is desirable for its relative simplicity, but which does not seem to be a sensible approach outside the context of programmable logic.An optoelectronic FPGA demonstrator along these lines is currently being realised. This involves besides the actual CMOS FPGA, t...
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