Gallium nitride (GaN) is a compound semiconductor that has tremendous potential to facilitate economic growth in a semiconductor industry that is silicon-based and currently faced with diminishing returns of performance versus cost of investment. At a material level, its high electric field strength and electron mobility have already shown tremendous potential for high frequency communications and photonic applications. Advances in growth on commercially viable large area substrates are now at the point where power conversion applications of GaN are at the cusp of commercialisation. The future for building on the work described here in ways driven by specific challenges emerging from entirely new markets and applications is very exciting. This collection of GaN technology developments is therefore not itself a road map but a valuable collection of global state-of-the-art GaN research that will inform the next phase of the technology as market driven requirements evolve. First generation production devices are igniting large new markets and applications that can only be achieved using the advantages of higher speed, low specific resistivity and low saturation switching transistors. Major investments are being made by industrial companies in a wide variety of markets exploring the use of the technology in new circuit topologies, packaging solutions and system architectures that are required to achieve and optimise the system advantages offered by GaN transistors. It is this momentum that will drive priorities for the next stages of device research gathered here.
ower GaN transistors have recently demonstrated to be excellent devices for application in power electronics. The high breakdown field and the superior mobility of the 2-dimensional electron gas allow to fabricate transistors with low resistive and switching losses, that permit to increase the efficiency of switching mode power converters beyond 99 %. GaN-based transistors are currently supposed to be adopted in KW-range power converters; 650 V transistors are already available on the market, and 1200 V devices are currently under development. During operation, GaN power transistors can reach critical conditions, especially in the off-state (with a high VDS, in excess of 650 V), during hard-switching (where high current and voltage can be simultaneously present), and for high positive gate voltages (in the case of normally-off devices). This paper reports our most recent results on the gradual and catastrophic degradation of GaN-based power HEMTs. We present the results of three different case studies, on: (i) the time-dependent breakdown of power HEMTs submitted to high off-state stress; (ii) the degradation of HEMTs with p-GaN gate submitted to high gate stress; (iii) the hot electron effects in GaN-MISHEMTs submitted to high-Temperature source current stres
We present a first study of threshold voltage instabilities of semi-vertical GaN-on-Si trench-MOSFETs, based on double pulsed, threshold voltage transient, and UV-assisted C-V analysis. Under positive gate stress, small negative V th shifts (low stress) and a positive V th shifts (high stress) are observed, ascribed to trapping within the insulator and at the metal/insulator interface. Trapping effects are eliminated through exposure to UV light; wavelength-dependent analysis extracts the threshold de-trapping energy ≈2.95 eV. UV-assisted CV measurements describe the distribution of states at the GaN/Al 2 O 3 interface. The described methodology provides an understanding and assessment of trapping mechanisms in vertical GaN transistors.
This paper presents an extensive investigation of the impact of the resistivity of the silicon substrate on the vertical leakage and charge trapping in 200 V GaN-on-Si enhancement-mode high-electron mobility transistors. Three wafers having different substrate resistivities were submitted to combined DC characterization, step-stress experiments, and electroluminescence (EL) analysis. The results described within this paper demonstrate that: 1) the use of a highly resistive silicon substrate can increase the vertical breakdown voltage of the transistors, due to the fact that the voltage drop on the GaN buffer is mitigated by the partial depletion of the substrate (this latter causes a plateau region in the drain to substrate I-V characteristic) and 2) highly resistive substrate results in stronger trapping effects, due to the capacitance of the depleted substrate and the resulting backgating effects. The results described within this paper indicate that the choice of the resistivity of the substrate is the result of a tradeoff between high breakdown voltage (that could be in principle achieved through a highly resistive substrate) and the minimization of trapping processes (which can be hardly obtained with a resistive substrate).Index Terms-Buffer traps, GaN, high-electron mobility transistor (HEMT), vertical leakage. I. INTRODUCTIONG AN-ON-SILICON power high-electron mobility transistors (HEMTs) are promising devices for switching application in the range of voltages up to 1200 V. Thanks
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