Sub 200 nm wafer-to-wafer (w2w) overlay accuracy on the entire 300 mm wafer was successfully demonstrated via wafer level Cu/SiO 2 hybrid bonding. Cu bonding pads relevant for back-side illuminated (BSI) complementary metal oxide semiconductor (CMOS) image sensor (CIS) were used for the experiment. Further, a crucial component to improve the overlay accuracy, namely the overlay model which identifies systematic alignment errors, was described. IntroductionThe growing demand for increased functionality and higher performance in integrated circuits (ICs) requires more transistors which means the transistor and interconnect size must decrease in order to maintain the same chip size (with respect to its lateral dimensions). Because of these factors different integration schemes like three-dimensional (3D) ICs with the purpose of reducing global interconnection length become more and more relevant for increased speed and operation frequency. W2w bonding is an attractive and crucial technique for enabling 3D integration. The bonding processes of fusion bonding and metal bonding, such as metal thermocompression, eutectic, and transient liquid phase (TLP) bonding, are well established and many of them are already in mass production [1][2][3][4]. The more recent approach of hybrid wafer level bonding is an attractive technique for reliably connecting heterogeneous structures, such as connecting processor with memory, analogue IC or microelectromechanical systems (MEMS), having high-density interconnects (<10 μm pitch). Within this work the bonding process for Cu/SiO 2 hybrid structures, which is an attractive material combination for BSI CIS, was investigated [5]. Furthermore, relevant changes to improve the w2w post-bond overlay accuracy are presented, as well as the overlay model which was introduced to isolate and quantify different global misalignment root causes, such as translation, rotation and scaling.
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