Nanowires are filamentary crystals with a tailored diameter that can be obtained using a plethora of different synthesis techniques. In this review, we focus on the vapor phase, highlighting the most influential achievements along with a historical perspective. Starting with the discovery of VLS, we feature the variety of structures and materials that can be synthesized in the nanowire form. We then move on to establish distinct features such as the three-dimensional heterostructure/doping design and polytypism. We summarize the status quo of the growth mechanisms, recently confirmed by in situ electron microscopy experiments and defining common ground between the different synthesis techniques. We then propose a selection of remaining defects, starting from what we know and going toward what is still to be learned. We believe this review will serve as a reference for neophytes but also as an insight for experts in an effort to bring open questions under a new light.

Achieving quantum confinement by bottom-up growth of nanowires has so far been limited to the ability of obtaining stable metal droplets of radii around 10 nm or less. This is within reach for gold-assisted growth. Because of the necessity to maintain the group III droplets during growth, direct synthesis of quantum sized structures becomes much more challenging for self-assisted III−V nanowires. In this work, we elucidate and solve the challenges that involve the synthesis of galliumassisted quantum-sized GaAs nanowires. We demonstrate the existence of two stable contact angles for the gallium droplet on top of GaAs nanowires. Contact angle around 130°fosters a continuous increase in the nanowire radius, while 90°allows for the stable growth of ultrathin tops. The experimental results are fully consistent with our model that explains the observed morphological evolution under the two different scenarios. We provide a generalized theory of self-assisted III−V nanowires that describes simultaneously the droplet shape relaxation and the NW radius evolution. Bistability of the contact angle described here should be the general phenomenon that pertains for any vapor−liquid−solid nanowires and significantly refines our picture of how nanowires grow. Overall, our results suggest a new path for obtaining ultrathin one-dimensional III−V nanostructures for studying lateral confinement of carriers. KEYWORDS: III−V semiconductors on silicon, nanowires, nanoneedles, regular arrays, self-assisted growth, droplet size engineering, crystal structure, growth modeling F undamental physical properties and applications of semiconductor nanowires (NWs) may benefit from quantum confinement due to size-dependent modulation of the density of states as well as modification of the photon energy for the allowed optical transitions.1 In GaAs, quantum confinement occurs for a size below 25 nm.2,3 In addition to quantum confinement, the optical properties can be engineered by modifying the NW shape. For example, progressively tapered nanowires have exhibited adiabatic outcoupling in the emission of quantum dots, thereby enhancing their brightness. 4 A similar design may improve the light extraction or absorption in different optoelectronic devices including light emitting diodes, solar cells, and optical biosensors.5−11 Quantum confinement in the core of radial NW heterostructures allows for the fabrication of high quality NW-based quantum dots, which are a perfect platform for delicate quantum transport experiments. 12,13 It is admittedly challenging to obtain very thin (quantumconfined) III−V NWs directly by the vapor−liquid−solid (VLS) growth technique. There are several reasons for that (see ref 14 for a review), including the Gibbs−Thomson effect of elevation of chemical potential due to the curvature of the droplet surface and difficulties in obtaining very small droplets on the substrate surface. Thin tips of VLS GaAs NWs with a stable radius down to 5 nm have previously been grown by hydride vapor phase epitaxy 15,16 (a te...

Topological qubits based on Majorana Fermions have the potential to revolutionize the emerging field of quantum computing by making information processing significantly more robust to decoherence. Nanowires are a promising medium for hosting these kinds of qubits, though branched nanowires are needed to perform qubit manipulations. Here we report a gold-free templated growth of III-V nanowires by molecular beam epitaxy using an approach that enables patternable and highly regular branched nanowire arrays on a far greater scale than what has been reported thus far. Our approach relies on the lattice-mismatched growth of InAs on top of defect-free GaAs nanomembranes yielding laterally oriented, low-defect InAs and InGaAs nanowires whose shapes are determined by surface and strain energy minimization. By controlling nanomembrane width and growth time, we demonstrate the formation of compositionally graded nanowires with cross-sections less than 50 nm. Scaling the nanowires below 20 nm leads to the formation of homogeneous InGaAs nanowires, which exhibit phase-coherent, quasi-1D quantum transport as shown by magnetoconductance measurements. These results are an important advance toward scalable topological quantum computing.

III-V semiconductor nanowires deterministically placed on top of silicon electronic platform would open many avenues in silicon-based photonics, quantum technologies and energy harvesting. For this to become a reality, gold-free site-selected growth is necessary. Here, we propose a mechanism which gives a clear route for maximizing the nanowire yield in the self-catalyzed growth fashion. It is widely accepted that growth of nanowires occurs on a layer-by-layer basis, starting at the triple-phase line. Contrary to common understanding, we find that vertical growth of nanowires starts at the oxide-substrate line interface, forming a ring-like structure several layers thick. This is granted by optimizing the diameter/height aspect ratio and cylindrical symmetry of holes, which impacts the diffusion flux of the group V element through the well-positioned group III droplet. This work provides clear grounds for realistic integration of III-Vs on silicon and for the organized growth of nanowires in other material systems.

Selective area epitaxy (SAE) provides the path for scalable fabrication of semiconductor nanostructures in a device-compatible configuration. In the current paradigm, SAE is understood as localized epitaxy and is modelled by combining planar and self-assembled nanowire growth mechanisms. Here we use GaAs SAE as a model system to provide a different perspective. First, we provide evidence of the significant impact of the annealing stage in the calculation of the growth rates. Then, by elucidating the effect of geometrical constraints on the growth of the semiconductor crystal, we demonstrate the role of adatom desorption and resorption beyond the direct-impingement and diffusion-limited regime. Our theoretical model explains the effect of these constraints on the growth, and in particular why the SAE growth rate is highly sensitive to the pattern geometry. Finally, the disagreement of the model at the largest pitch points to non-negligible multiple adatom recycling between patterned features. Overall, our findings point out the importance of considering adatom diffusion, adsorption and desorption dynamics in designing the SAE pattern to create predetermined nanoscale structures across a wafer. These results are fundamental for the SAE process to become viable in the semiconductor industry.