This paper reports the outcome of multiple environmental stresses subjected to quantify the thermal impedance value (Rjn) of a phase change thermal interface material for Wave Solder Heat Sink on a bare die FCBGA package. Based on the accelerated reliability stresses, statistical models were created where possible to represent Rj. performance over time at use condition and temperatures using modifed Arrhenius type of equations. The lack of adequate pressure on the TIM produced significant material degradation in Bake. However, the post reliability R, derived was still below the thermal design target of 1.96 'Ccm2/W which, indicates that the TIM material can sufficiently cool the package until the end of its use life.
Die bump temperature become engineering challenge because both Thermal Design Power (TDP) and die bump electrical current increased with flip chip functionality. Die bumps with smaller geometry experienced higher heat flux than silicon die. Thus, an accurate modeling and empirical methodology are needed in order to understand die bump temperature measurement accuracy and self-heating characteristic. This paper outlines and demonstrates the advantages of applying numerical modeling in chipset die bump temperature measurement methodology development and use conditions evaluation. Two types of die bump temperature measurement designs have been evaluated during early stage of design cycle, these included single and multiple die bump structure designs. JEDEC test standard in 0-JA (JESD51-2, junction to still air thermal resistance) has been used as design validation and follow by typical desktop computer use conditions evaluation. In an effort to develop comprehensive understanding of die bump self-heating characteristic, a commercial Computational Fluid Dynamics (CFD) engineering tool has been employed. Both global and local CFD modeling analysis suggested multiple die bump temperature measurement design provided more accurate result than single die bump design. Silicon trace self-heating in single die bump design has over estimated the die bump temperature during actual use conditions. In addition, die bump self-heating characteristic is impacted by non-uniform heating effect, current density, TDP and different die bump material options. Thus, an accurate die bump temperature measurement methodology has been developed through both numerical and empirical validation.
Liquid immersion cooling offers an alternative means to counter the high amount of heat dissipated by electronic packages. This study focuses on conjugate heat transfer analysis of a double PLCC packages mounted on a vertical PCB cooled by different Flourinert liquids such as FC 77, FC 3283, FC 43 and FC 70 with the aid of a CFD software. The effects of package power, flow velocity and the use of different types of dielectric liquids on the performance of the above PLCC packages are investigated. A comparison with air-cooled cases clearly indicates that a very much lower surface temperature exists on the operating packages in the case of dielectric liquids. For the convenience of application in the electronic industry, the results are presented in the form of correlations for junction temperature for each package.
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